TY - JOUR
T1 - A PWM Buck Converter with Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems
AU - Park, Sung Yun
AU - Cho, Jihyun
AU - Lee, Kyuseok
AU - Yoon, Euisik
N1 - Publisher Copyright:
© 2015 IEEE.
Copyright:
Copyright 2016 Elsevier B.V., All rights reserved.
PY - 2015/12
Y1 - 2015/12
N2 - We report a pulse width modulation (PWM) buck converter that is able to achieve a power conversion efficiency (PCE) of >80% in light loads (< 100μ A) for implantable biomedical systems. In order to achieve a high PCE for the given light loads, the buck converter adaptively reconfigures the size of power PMOS and NMOS transistors and their gate drivers in accordance with load currents, while operating at a fixed frequency of 1 MHz. The buck converter employs the analog-digital hybrid control scheme for coarse/fine adjustment of power transistors. The coarse digital control generates an approximate duty cycle necessary for driving a given load and selects an appropriate width of power transistors to minimize redundant power dissipation. The fine analog control provides the final tuning of the duty cycle to compensate for the error from the coarse digital control. The mode switching between the analog and digital controls is accomplished by a mode arbiter which estimates the average of duty cycles for the given load condition from limit cycle oscillations (LCO) induced by coarse adjustment. The fabricated buck converter achieved a peak efficiency of 86.3% at 1.4 mA and > 80% efficiency for a wide range of load conditions from 45 μ A to 4.1 mA, while generating 1 V output from 2.5-3.3 V supply. The converter occupies 0.375 mm2 in 0.18 μ m CMOS processes and requires two external components: 1.2 μ F capacitor and 6.8 μ H inductor.
AB - We report a pulse width modulation (PWM) buck converter that is able to achieve a power conversion efficiency (PCE) of >80% in light loads (< 100μ A) for implantable biomedical systems. In order to achieve a high PCE for the given light loads, the buck converter adaptively reconfigures the size of power PMOS and NMOS transistors and their gate drivers in accordance with load currents, while operating at a fixed frequency of 1 MHz. The buck converter employs the analog-digital hybrid control scheme for coarse/fine adjustment of power transistors. The coarse digital control generates an approximate duty cycle necessary for driving a given load and selects an appropriate width of power transistors to minimize redundant power dissipation. The fine analog control provides the final tuning of the duty cycle to compensate for the error from the coarse digital control. The mode switching between the analog and digital controls is accomplished by a mode arbiter which estimates the average of duty cycles for the given load condition from limit cycle oscillations (LCO) induced by coarse adjustment. The fabricated buck converter achieved a peak efficiency of 86.3% at 1.4 mA and > 80% efficiency for a wide range of load conditions from 45 μ A to 4.1 mA, while generating 1 V output from 2.5-3.3 V supply. The converter occupies 0.375 mm2 in 0.18 μ m CMOS processes and requires two external components: 1.2 μ F capacitor and 6.8 μ H inductor.
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U2 - 10.1109/TBCAS.2015.2501304
DO - 10.1109/TBCAS.2015.2501304
M3 - Article
C2 - 26742139
AN - SCOPUS:84953318996
VL - 9
SP - 885
EP - 895
JO - IEEE Transactions on Biomedical Circuits and Systems
JF - IEEE Transactions on Biomedical Circuits and Systems
SN - 1932-4545
IS - 6
M1 - 7370953
ER -