A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications

Chanik Park; Wonmoon Cheon; Yangsup Lee; Myoung Soo Jung; Wonhee Cho; Hanbin Yoon

doi:10.1109/RSP.2007.8

A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications

Chanik Park, Wonmoon Cheon, Yangsup Lee, Myoung Soo Jung, Wonhee Cho, Hanbin Yoon

School of Integrated Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

19 Citations (Scopus)

Abstract

In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.

Original language	English
Title of host publication	18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings
Pages	202-208
Number of pages	7
DOIs	https://doi.org/10.1109/RSP.2007.8
Publication status	Published - 2007
Event	18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07 - Porto alegre, Brazil Duration: 2007 May 28 → 2007 May 30

Publication series

Name	Proceedings of the International Workshop on Rapid System Prototyping
ISSN (Print)	1074-6005

Other

Other	18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07
Country/Territory	Brazil
City	Porto alegre
Period	07/5/28 → 07/5/30

All Science Journal Classification (ASJC) codes

Computer Science(all)

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10.1109/RSP.2007.8

Cite this

Park, C., Cheon, W., Lee, Y., Jung, M. S., Cho, W., & Yoon, H. (2007). A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications. In 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings (pp. 202-208). [4228507] (Proceedings of the International Workshop on Rapid System Prototyping). https://doi.org/10.1109/RSP.2007.8

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title = "A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications",

abstract = "In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.",

author = "Chanik Park and Wonmoon Cheon and Yangsup Lee and Jung, {Myoung Soo} and Wonhee Cho and Hanbin Yoon",

year = "2007",

doi = "10.1109/RSP.2007.8",

language = "English",

isbn = "0769528341",

series = "Proceedings of the International Workshop on Rapid System Prototyping",

pages = "202--208",

booktitle = "18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings",

note = "18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07 ; Conference date: 28-05-2007 Through 30-05-2007",

}

Park, C, Cheon, W, Lee, Y, Jung, MS, Cho, W & Yoon, H 2007, A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications. in 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings., 4228507, Proceedings of the International Workshop on Rapid System Prototyping, pp. 202-208, 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Porto alegre, Brazil, 07/5/28. https://doi.org/10.1109/RSP.2007.8

A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications. / Park, Chanik; Cheon, Wonmoon; Lee, Yangsup et al.

18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings. 2007. p. 202-208 4228507 (Proceedings of the International Workshop on Rapid System Prototyping).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.

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A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications

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