Abstract
In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.
| Original language | English |
|---|---|
| Title of host publication | 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings |
| Pages | 202-208 |
| Number of pages | 7 |
| DOIs | |
| Publication status | Published - 2007 Sep 25 |
| Event | 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07 - Porto alegre, Brazil Duration: 2007 May 28 → 2007 May 30 |
Other
| Other | 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07 |
|---|---|
| Country | Brazil |
| City | Porto alegre |
| Period | 07/5/28 → 07/5/30 |
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All Science Journal Classification (ASJC) codes
- Computer Science(all)
Cite this
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A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications. / Park, Chanik; Cheon, Wonmoon; Lee, Yangsup; Jung, Myoung Soo; Cho, Wonhee; Yoon, Hanbin.
18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings. 2007. p. 202-208 4228507.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications
AU - Park, Chanik
AU - Cheon, Wonmoon
AU - Lee, Yangsup
AU - Jung, Myoung Soo
AU - Cho, Wonhee
AU - Yoon, Hanbin
PY - 2007/9/25
Y1 - 2007/9/25
N2 - In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.
AB - In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.
UR - http://www.scopus.com/inward/record.url?scp=34548724459&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34548724459&partnerID=8YFLogxK
U2 - 10.1109/RSP.2007.8
DO - 10.1109/RSP.2007.8
M3 - Conference contribution
SN - 0769528341
SN - 9780769528342
SP - 202
EP - 208
BT - 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings
ER -