A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications

Chanik Park, Wonmoon Cheon, Yangsup Lee, Myoung Soo Jung, Wonhee Cho, Hanbin Yoon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

19 Citations (Scopus)

Abstract

In this paper, we propose a novel FTL (Flash Translation Layer) architecture for NAND flash based applications such as mp3 players, DSCs (Digital still camera) and SSDs (Solid-state disk). Even though the basic function of an FTL is to translate a logical sector address to a physical sector address in flash memory, its efficient algorithms have a significant impact on performance as well as lifetime. After we categorize dominant parameters that affect performance and endurance, we explore the design space of the FTL architecture based on a diverse workload analysis. With our FTL architectural framework, we can decide which configuration of FTL mapping parameters yields the best performance depending on each NAND flash application behavior.

Original languageEnglish
Title of host publication18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings
Pages202-208
Number of pages7
DOIs
Publication statusPublished - 2007 Sep 25
Event18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07 - Porto alegre, Brazil
Duration: 2007 May 282007 May 30

Publication series

NameProceedings of the International Workshop on Rapid System Prototyping
ISSN (Print)1074-6005

Other

Other18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07
CountryBrazil
CityPorto alegre
Period07/5/2807/5/30

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All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Cite this

Park, C., Cheon, W., Lee, Y., Jung, M. S., Cho, W., & Yoon, H. (2007). A re-configurable FTL (Flash Translation Layer) architecture for NAND flash based applications. In 18th IEEE/IFIP International Workshop on Rapid System Prototyping, RSP '07, Proceedings (pp. 202-208). [4228507] (Proceedings of the International Workshop on Rapid System Prototyping). https://doi.org/10.1109/RSP.2007.8