A scan shifting method based on clock gating of multiple groups for low power scan testing

Sungyoul Seo, Yong Lee, Joohwan Lee, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Abstract

From the advent of very large scale integration (VLSI) design, a larger power consumption of a scan-based testing has been one of the most serious problems. The large number of scan cells lead to excessive switching activities during the scan shifting operations. In this paper, we present a new scan shifting method based on clock gating of multiple groups by reducing toggle rate of the internal combinational logic. This method prevents cumulative transitions caused by shifting operations of the scan cells. In addition, the existing compression schemes can be compatible with the proposed method without modification of decompression architecture. Experimental results on ITC'99 benchmark circuits and industrial circuits show that this shifting method reduces the scan shifting power in all cases. In spite of outperformed power, a burden of the extra logic is not necessary to be contemplated.

Original languageEnglish
Title of host publicationProceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015
PublisherIEEE Computer Society
Pages162-166
Number of pages5
ISBN (Electronic)9781479975815
DOIs
Publication statusPublished - 2015 Jan 1
Event16th International Symposium on Quality Electronic Design, ISQED 2015 - Santa Clara, United States
Duration: 2015 Mar 22015 Mar 4

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2015-April
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other16th International Symposium on Quality Electronic Design, ISQED 2015
CountryUnited States
CitySanta Clara
Period15/3/215/3/4

Fingerprint

Clocks
Networks (circuits)
VLSI circuits
Testing
Electric power utilization

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

Cite this

Seo, S., Lee, Y., Lee, J., & Kang, S. (2015). A scan shifting method based on clock gating of multiple groups for low power scan testing. In Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015 (pp. 162-166). [7085417] (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2015-April). IEEE Computer Society. https://doi.org/10.1109/ISQED.2015.7085417
Seo, Sungyoul ; Lee, Yong ; Lee, Joohwan ; Kang, Sungho. / A scan shifting method based on clock gating of multiple groups for low power scan testing. Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015. IEEE Computer Society, 2015. pp. 162-166 (Proceedings - International Symposium on Quality Electronic Design, ISQED).
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Seo, S, Lee, Y, Lee, J & Kang, S 2015, A scan shifting method based on clock gating of multiple groups for low power scan testing. in Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015., 7085417, Proceedings - International Symposium on Quality Electronic Design, ISQED, vol. 2015-April, IEEE Computer Society, pp. 162-166, 16th International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, United States, 15/3/2. https://doi.org/10.1109/ISQED.2015.7085417

A scan shifting method based on clock gating of multiple groups for low power scan testing. / Seo, Sungyoul; Lee, Yong; Lee, Joohwan; Kang, Sungho.

Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015. IEEE Computer Society, 2015. p. 162-166 7085417 (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2015-April).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Seo S, Lee Y, Lee J, Kang S. A scan shifting method based on clock gating of multiple groups for low power scan testing. In Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015. IEEE Computer Society. 2015. p. 162-166. 7085417. (Proceedings - International Symposium on Quality Electronic Design, ISQED). https://doi.org/10.1109/ISQED.2015.7085417