A selective filter-bank TLB system [embedded processor MMU for low power]

Jung Hoon Lee, Gi Ho Park, Sung Bae Park, Shin Dug Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

18 Citations (Scopus)

Abstract

We present a selective filter-bank translation lookaside buffer (TLB) system with low power consumption for embedded processors. The proposed TLB is constructed as multiple banks with a small two-bank buffer, called a filter-bank buffer, located above its associated bank. Either a filter-bank buffer or a main bank TLB can be selectively accessed, based on two bits in the filter-bank buffer. Energy savings are achieved by reducing the number of entries accessed at a time, by using filtering and the bank mechanism. The overhead of the proposed TLB turns out to be negligible compared with other hierarchical structures. Simulation results show that the energy×delay product can be reduced by about 88% compared with a fully -associative TLB, 75% with respect to a filter-TLB, and 51% relative to a banked-filter TLB.

Original languageEnglish
Title of host publicationISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages312-317
Number of pages6
ISBN (Electronic)158113682X
DOIs
Publication statusPublished - 2003
Event2003 International Symposium on Low Power Electronics and Design, ISLPED 2003 - Seoul, Korea, Republic of
Duration: 2003 Aug 252003 Aug 27

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
Volume2003-January
ISSN (Print)1533-4678

Conference

Conference2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
CountryKorea, Republic of
CitySeoul
Period03/8/2503/8/27

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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