A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET

Hagyoul Bae, Choong Ki Kim, Seung Bae Jeon, Gwang Hyuk Shin, Eung Taek Kim, Jeong Gyu Song, Youngjun Kim, Dong Il Lee, Hyungjun Kim, Sung Yool Choi, Kyung Cheol Choi, Yang Kyu Choi

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

Asymmetric source and drain (S/D) series resistances ( RS and RD ) are unavoidable in exfoliated MoS2 field-effect transistors (EM-FETs). Through combining the capacitance-voltage (C-V) and current-voltage characteristics, the asymmetric RS and RD values are extracted separately. First, the frequency-dispersive C-V characteristics are analyzed in a frequency range of 0.3-10 kHz. Second, the intrinsic RS and RD values ( RS,int and RD,int) are characterized through deembedding the parasitic pad capacitances (CPad = CS,Pad+CD,Pad) between the S/D metal and the bottom gate (G) in an overlapped region with the consideration of the structure-dependent parameters in the EM-FET. The proposed methodology is verified through comparison with the well-known channel resistance method, which is based on only the ID- VD characteristics in the linear region. Finally, RS,int and RD,int at various parasitic overlap areas are extracted separately with improved accuracy.

Original languageEnglish
Article number7377027
Pages (from-to)231-233
Number of pages3
JournalIEEE Electron Device Letters
Volume37
Issue number2
DOIs
Publication statusPublished - 2016 Feb 1

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Field effect transistors
Capacitance
Electric potential
Current voltage characteristics
Metals

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Bae, Hagyoul ; Kim, Choong Ki ; Jeon, Seung Bae ; Shin, Gwang Hyuk ; Kim, Eung Taek ; Song, Jeong Gyu ; Kim, Youngjun ; Lee, Dong Il ; Kim, Hyungjun ; Choi, Sung Yool ; Choi, Kyung Cheol ; Choi, Yang Kyu. / A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET. In: IEEE Electron Device Letters. 2016 ; Vol. 37, No. 2. pp. 231-233.
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abstract = "Asymmetric source and drain (S/D) series resistances ( RS and RD ) are unavoidable in exfoliated MoS2 field-effect transistors (EM-FETs). Through combining the capacitance-voltage (C-V) and current-voltage characteristics, the asymmetric RS and RD values are extracted separately. First, the frequency-dispersive C-V characteristics are analyzed in a frequency range of 0.3-10 kHz. Second, the intrinsic RS and RD values ( RS,int and RD,int) are characterized through deembedding the parasitic pad capacitances (CPad = CS,Pad+CD,Pad) between the S/D metal and the bottom gate (G) in an overlapped region with the consideration of the structure-dependent parameters in the EM-FET. The proposed methodology is verified through comparison with the well-known channel resistance method, which is based on only the ID- VD characteristics in the linear region. Finally, RS,int and RD,int at various parasitic overlap areas are extracted separately with improved accuracy.",
author = "Hagyoul Bae and Kim, {Choong Ki} and Jeon, {Seung Bae} and Shin, {Gwang Hyuk} and Kim, {Eung Taek} and Song, {Jeong Gyu} and Youngjun Kim and Lee, {Dong Il} and Hyungjun Kim and Choi, {Sung Yool} and Choi, {Kyung Cheol} and Choi, {Yang Kyu}",
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Bae, H, Kim, CK, Jeon, SB, Shin, GH, Kim, ET, Song, JG, Kim, Y, Lee, DI, Kim, H, Choi, SY, Choi, KC & Choi, YK 2016, 'A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET', IEEE Electron Device Letters, vol. 37, no. 2, 7377027, pp. 231-233. https://doi.org/10.1109/LED.2015.2509473

A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET. / Bae, Hagyoul; Kim, Choong Ki; Jeon, Seung Bae; Shin, Gwang Hyuk; Kim, Eung Taek; Song, Jeong Gyu; Kim, Youngjun; Lee, Dong Il; Kim, Hyungjun; Choi, Sung Yool; Choi, Kyung Cheol; Choi, Yang Kyu.

In: IEEE Electron Device Letters, Vol. 37, No. 2, 7377027, 01.02.2016, p. 231-233.

Research output: Contribution to journalArticle

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T1 - A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET

AU - Bae, Hagyoul

AU - Kim, Choong Ki

AU - Jeon, Seung Bae

AU - Shin, Gwang Hyuk

AU - Kim, Eung Taek

AU - Song, Jeong Gyu

AU - Kim, Youngjun

AU - Lee, Dong Il

AU - Kim, Hyungjun

AU - Choi, Sung Yool

AU - Choi, Kyung Cheol

AU - Choi, Yang Kyu

PY - 2016/2/1

Y1 - 2016/2/1

N2 - Asymmetric source and drain (S/D) series resistances ( RS and RD ) are unavoidable in exfoliated MoS2 field-effect transistors (EM-FETs). Through combining the capacitance-voltage (C-V) and current-voltage characteristics, the asymmetric RS and RD values are extracted separately. First, the frequency-dispersive C-V characteristics are analyzed in a frequency range of 0.3-10 kHz. Second, the intrinsic RS and RD values ( RS,int and RD,int) are characterized through deembedding the parasitic pad capacitances (CPad = CS,Pad+CD,Pad) between the S/D metal and the bottom gate (G) in an overlapped region with the consideration of the structure-dependent parameters in the EM-FET. The proposed methodology is verified through comparison with the well-known channel resistance method, which is based on only the ID- VD characteristics in the linear region. Finally, RS,int and RD,int at various parasitic overlap areas are extracted separately with improved accuracy.

AB - Asymmetric source and drain (S/D) series resistances ( RS and RD ) are unavoidable in exfoliated MoS2 field-effect transistors (EM-FETs). Through combining the capacitance-voltage (C-V) and current-voltage characteristics, the asymmetric RS and RD values are extracted separately. First, the frequency-dispersive C-V characteristics are analyzed in a frequency range of 0.3-10 kHz. Second, the intrinsic RS and RD values ( RS,int and RD,int) are characterized through deembedding the parasitic pad capacitances (CPad = CS,Pad+CD,Pad) between the S/D metal and the bottom gate (G) in an overlapped region with the consideration of the structure-dependent parameters in the EM-FET. The proposed methodology is verified through comparison with the well-known channel resistance method, which is based on only the ID- VD characteristics in the linear region. Finally, RS,int and RD,int at various parasitic overlap areas are extracted separately with improved accuracy.

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