A phase-shift keying (PSK) demodulator is demonstrated for the target application of low power and high data rate inductive links. The demodulator based on the single-bit sampling demodulation scheme is capable of operating in binary, quadrature, 8-, and 16-PSK mode. The prototype chip realized in 0.18-μm CMOS process can demodulate up to 1.25 MSymbol/s at 5-MHz carrier frequency. It occupies 240×310 μm2 and consumes 140 μA from 1.2 V.
Bibliographical noteFunding Information:
This work was supported by the National Research Foundation of Korea funded by the Korean Government (MEST) under Grant 2012R1A2A1A01009233 . The authors would like to thank IC Design Education Center (IDEC) for EDA software support.
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering