As process technology scales down, sensing becomes difficult during read operations because the supply voltage, i.e., VDD, decreases and the process variation increases. Thus, a high enough sensing yield cannot be obtained with a conventional sensing circuit in deep submicron process technology. In this brief, a split-path sensing circuit is proposed to achieve a large enough sensing margin by using a variable reference voltage. The proposed sensing circuit is verified using Monte Carlo HSPICE simulation with industry-compatible low-leakage 45-nm model parameters. The proposed circuit has a sensing yield of 99% for 1-Mb memory with a sensing time of 1 ns and a sensing yield of 99% for 32-Mb memory with a sensing time of 3 ns.
|Number of pages||5|
|Journal||IEEE Transactions on Circuits and Systems II: Express Briefs|
|Publication status||Published - 2014 Mar|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering