As a rapid progress in technology processes, the design integration of high-performance system-on-chip (SoC) is on the rise rapidly. To incorporate hundreds of IP cores into a single chip, a modern SoC exceeds ten million gates with a large number of scan cells, so that it leads excessive energy consumption. In this paper, we present an energy-quality (EQ) scalable scan test method using new scan chain reordering. The method conducts three stages, which are a new scan partitioning, a scan partition-based X-filling, and a statistic-based scan stitching to reduce test energy consumption without quality degradation. The proposed scan partitioning method prevents excessive routing overhead. Then, the proposed scan chain reordering is performed by a statistical analysis considering EQ scalability. It also covers two frequently-used fault models: 1) stuck-at and 2) transition delay. The experimental results show that the proposed scan chain reordering method achieved lower energy consumption and relieve the routing overhead on ISCAS'89, ITC'99, and IWLS'05 OpenCores benchmark circuits in most cases compared with previously existing methods without excessive runtime overhead.
|Number of pages||13|
|Journal||IEEE Journal on Emerging and Selected Topics in Circuits and Systems|
|Publication status||Published - 2018 Sep|
Bibliographical noteFunding Information:
Manuscript received December 29, 2017; revised March 29, 2018; accepted April 28, 2018. Date of publication May 7, 2018; date of current version September 11, 2018. This work was supported in part by the Ministry of Trade, Industry and Energy under Grant 10067813 and in part by the Korea Semiconductor Research Consortium support program for the development of the future semiconductor device. This paper was recommended by Guest Editor V. De. (Corresponding author: Sungho Kang.) The authors are with the Electrical and Electronic Engineering Department, Yonsei University, Seoul 03722, South Korea (e-mail: firstname.lastname@example.org; email@example.com; firstname.lastname@example.org. ac.kr; email@example.com).
© 2011 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering