Abstract
In this paper, a new design for an error correcting code (ECC) is proposed. The design is aimed to build an ECC circuitry with minimal power consumption. The genetic algorithm equipped with the symbiotic mechanism is used to design a power-efficient ECC which provides singleerror correction and double-error detection (SEC-DED). We formulate the selection of the parity check matrix into a collection of individual and specialized optimization problems and propose a symbiotic evolution method to search for an ECC with minimal power consumption. Finally, we conduct simulations to demonstrate the effectiveness of the proposed method.
| Original language | English |
|---|---|
| Pages (from-to) | 799-806 |
| Number of pages | 8 |
| Journal | ETRI Journal |
| Volume | 30 |
| Issue number | 6 |
| DOIs | |
| Publication status | Published - 2008 Dec 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Computer Science(all)
- Electrical and Electronic Engineering
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A symbiotic evolutionary design of error-correcting code with minimal power consumption. / Lee, Heesung; Kim, Euntai.
In: ETRI Journal, Vol. 30, No. 6, 01.12.2008, p. 799-806.Research output: Contribution to journal › Article
TY - JOUR
T1 - A symbiotic evolutionary design of error-correcting code with minimal power consumption
AU - Lee, Heesung
AU - Kim, Euntai
PY - 2008/12/1
Y1 - 2008/12/1
N2 - In this paper, a new design for an error correcting code (ECC) is proposed. The design is aimed to build an ECC circuitry with minimal power consumption. The genetic algorithm equipped with the symbiotic mechanism is used to design a power-efficient ECC which provides singleerror correction and double-error detection (SEC-DED). We formulate the selection of the parity check matrix into a collection of individual and specialized optimization problems and propose a symbiotic evolution method to search for an ECC with minimal power consumption. Finally, we conduct simulations to demonstrate the effectiveness of the proposed method.
AB - In this paper, a new design for an error correcting code (ECC) is proposed. The design is aimed to build an ECC circuitry with minimal power consumption. The genetic algorithm equipped with the symbiotic mechanism is used to design a power-efficient ECC which provides singleerror correction and double-error detection (SEC-DED). We formulate the selection of the parity check matrix into a collection of individual and specialized optimization problems and propose a symbiotic evolution method to search for an ECC with minimal power consumption. Finally, we conduct simulations to demonstrate the effectiveness of the proposed method.
UR - http://www.scopus.com/inward/record.url?scp=57349198280&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=57349198280&partnerID=8YFLogxK
U2 - 10.4218/etrij.08.0108.0188
DO - 10.4218/etrij.08.0108.0188
M3 - Article
AN - SCOPUS:57349198280
VL - 30
SP - 799
EP - 806
JO - ETRI Journal
JF - ETRI Journal
SN - 1225-6463
IS - 6
ER -