A test methodology to screen scan-path failures

Junghwan Kim; Young Woo Lee; Minho Cheong; Sungyoul Seo; Sungho Kang

doi:10.1109/ISOCC.2016.7799831

A test methodology to screen scan-path failures

Junghwan Kim, Young Woo Lee, Minho Cheong, Sungyoul Seo, Sungho Kang

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

It is important to screen scan-path failures because scan-path failures affect product yield even though these are not related to the device functional operations. However, the additional efforts such as diagnosis are required to screen scanpath failures. In this paper, we propose a new test methodology to screen scan-path failures under the Automatic-Test-Pattern- Generation (ATPG) constraints and the multi-capture-clock condition without diagnosis. Experimental results show that the proposed methodology efficiently screens scan-path failures with high test coverage.

Original language	English
Title of host publication	ISOCC 2016 - International SoC Design Conference
Subtitle of host publication	Smart SoC for Intelligent Things
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	149-150
Number of pages	2
ISBN (Electronic)	9781467393089
DOIs	https://doi.org/10.1109/ISOCC.2016.7799831
Publication status	Published - 2016 Dec 27
Event	13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of Duration: 2016 Oct 23 → 2016 Oct 26

Publication series

Name	ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things

Other

Other	13th International SoC Design Conference, ISOCC 2016
Country/Territory	Korea, Republic of
City	Jeju
Period	16/10/23 → 16/10/26

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/ISOCC.2016.7799831

Cite this

Kim, J., Lee, Y. W., Cheong, M., Seo, S., & Kang, S. (2016). A test methodology to screen scan-path failures. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things (pp. 149-150). [7799831] (ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISOCC.2016.7799831

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title = "A test methodology to screen scan-path failures",

abstract = "It is important to screen scan-path failures because scan-path failures affect product yield even though these are not related to the device functional operations. However, the additional efforts such as diagnosis are required to screen scanpath failures. In this paper, we propose a new test methodology to screen scan-path failures under the Automatic-Test-Pattern- Generation (ATPG) constraints and the multi-capture-clock condition without diagnosis. Experimental results show that the proposed methodology efficiently screens scan-path failures with high test coverage.",

author = "Junghwan Kim and Lee, {Young Woo} and Minho Cheong and Sungyoul Seo and Sungho Kang",

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Kim, J, Lee, YW, Cheong, M, Seo, S & Kang, S 2016, A test methodology to screen scan-path failures. in ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things., 7799831, ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things, Institute of Electrical and Electronics Engineers Inc., pp. 149-150, 13th International SoC Design Conference, ISOCC 2016, Jeju, Korea, Republic of, 16/10/23. https://doi.org/10.1109/ISOCC.2016.7799831

A test methodology to screen scan-path failures. / Kim, Junghwan; Lee, Young Woo; Cheong, Minho et al.

ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc., 2016. p. 149-150 7799831 (ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - It is important to screen scan-path failures because scan-path failures affect product yield even though these are not related to the device functional operations. However, the additional efforts such as diagnosis are required to screen scanpath failures. In this paper, we propose a new test methodology to screen scan-path failures under the Automatic-Test-Pattern- Generation (ATPG) constraints and the multi-capture-clock condition without diagnosis. Experimental results show that the proposed methodology efficiently screens scan-path failures with high test coverage.

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Kim J, Lee YW, Cheong M, Seo S, Kang S. A test methodology to screen scan-path failures. In ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things. Institute of Electrical and Electronics Engineers Inc. 2016. p. 149-150. 7799831. (ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things). doi: 10.1109/ISOCC.2016.7799831

A test methodology to screen scan-path failures

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