A Time-Interleaved Recursive Loop Band-Pass Delta-Sigma Modulator for a Digital IF CDMA Receiver

Minho Kwon, Gunhee Han, Jungyoon Lee

Research output: Contribution to journalArticle

7 Citations (Scopus)

Abstract

A bandpass delta-sigma modulator (BPDSM) is a key building block to implement a digital intermediate frequency (IF) receiver in a wireless communication system. This paper proposes a time-interleaved (TI) recursive loop BPDSM architecture that consists of five-stage TI blocks for a code-division multiple-access (CDMA) receiver. The proposed TI BPDSM provides reduction in the clock frequency requirement by a factor of 5 and relaxes the settling time requirement to one-fourth of the conventional approach. The test chip was designed and fabricated for a 30-MHz IF system with a 0.35-μm CMOS process. The measured peak SNR for a 1.25-MHz bandwidth is 48 dB while dissipating 75 mW from a 3.3-V supply and occupying 1.3 mm2.

Original languageEnglish
Pages (from-to)389-393
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume52
Issue number7
DOIs
Publication statusPublished - 2005 Jul 5

Fingerprint

Code division multiple access
Modulators
Clocks
Communication systems
Bandwidth

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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A Time-Interleaved Recursive Loop Band-Pass Delta-Sigma Modulator for a Digital IF CDMA Receiver. / Kwon, Minho; Han, Gunhee; Lee, Jungyoon.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 52, No. 7, 05.07.2005, p. 389-393.

Research output: Contribution to journalArticle

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