A time-to-digital converter based on a multiphase reference clock and a binary counter with a novel sampling error corrector

Kwang Chun Choi, Seung Woo Lee, Bhum Cheol Lee, Woo Young Choi

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

A new type of sampling error corrector for a time-to-digital converter (TDC) having a multiphase reference clock and a binary counter is demonstrated. With this corrector, sampling errors caused by asynchronous TDC inputs are corrected without requiring additional counters or reclocking circuits. A TDC having the corrector is implemented in 90-nm CMOS logic technology. It has 13.6-ps/least significant bit resolution and 13-bit input dynamic range. It consumes 18 mW from a 1.2-V supply and occupies a 100 × 210 μm 2 chip area.

Original languageEnglish
Article number6145624
Pages (from-to)143-147
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume59
Issue number3
DOIs
Publication statusPublished - 2012 Mar 1

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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