Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin

H. Park, S. C. Song, S. H. Woo, M. H. Abu-Rahma, L. Ge, M. G. Kang, B. M. Han, J. Wang, R. Choi, J. W. Yang, Seongook Jung, G. Yeap

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Abstract

Supply voltage (Vcc) scaling is mostly used method to achieve low power consumption. However, a high Vccmin is required to meet the high target yield because the SRAM yield according to Vcc scaling shows "dual slope". In this paper, the root causes of "dual slope" are analyzed. Both side effect of SRAM bitcell on the yield is also considered to accurately project Vccmin, which results in 40mV increase of Vccmin to meet 99% target yield for 32nm HK/MG planar 1M SRAM. The "dual slope" effect on the yield is compared for 32nm HK/MG planar and FinFET 32M SRAMs with high (HD) and low doping (LD). Under the "dual slope" effect, the channel length adjustment method for pass gate transistor is proposed to reduce Vccmin of FinFET SRAM. When the number of finis is 1:2:2(=PU:PG:PD), HD and LD 32M FinFET SRAMs improve Vccmin by 370mV and 500mV, respectively, compared to 32M planar counterparts using the proposed the channel length adjustment method. Effect of NBTI and PBTI on Vccmin is also investigated. BTI degradation is greatly dependent on HK thickness and surface plane orientation of FinFET. End of Life (EOL) Vccmin optimization therefore requires careful selection of HK thickness and surface orientation.

Original languageEnglish
Title of host publication2010 IEEE International Reliability Physics Symposium, IRPS 2010
Pages1008-1013
Number of pages6
DOIs
Publication statusPublished - 2010 Oct 20
Event2010 IEEE International Reliability Physics Symposium, IRPS 2010 - Garden Grove, CA, Canada
Duration: 2010 May 22010 May 6

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other2010 IEEE International Reliability Physics Symposium, IRPS 2010
CountryCanada
CityGarden Grove, CA
Period10/5/210/5/6

Fingerprint

Static random access storage
Doping (additives)
FinFET
Transistors
Electric power utilization
Degradation

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Park, H., Song, S. C., Woo, S. H., Abu-Rahma, M. H., Ge, L., Kang, M. G., ... Yeap, G. (2010). Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin. In 2010 IEEE International Reliability Physics Symposium, IRPS 2010 (pp. 1008-1013). [5488684] (IEEE International Reliability Physics Symposium Proceedings). https://doi.org/10.1109/IRPS.2010.5488684
Park, H. ; Song, S. C. ; Woo, S. H. ; Abu-Rahma, M. H. ; Ge, L. ; Kang, M. G. ; Han, B. M. ; Wang, J. ; Choi, R. ; Yang, J. W. ; Jung, Seongook ; Yeap, G. / Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin. 2010 IEEE International Reliability Physics Symposium, IRPS 2010. 2010. pp. 1008-1013 (IEEE International Reliability Physics Symposium Proceedings).
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title = "Accurate projection of Vccmin by modeling {"}dual slope{"} in FinFET based SRAM, and impact of long term reliability on end of life V ccmin",
abstract = "Supply voltage (Vcc) scaling is mostly used method to achieve low power consumption. However, a high Vccmin is required to meet the high target yield because the SRAM yield according to Vcc scaling shows {"}dual slope{"}. In this paper, the root causes of {"}dual slope{"} are analyzed. Both side effect of SRAM bitcell on the yield is also considered to accurately project Vccmin, which results in 40mV increase of Vccmin to meet 99{\%} target yield for 32nm HK/MG planar 1M SRAM. The {"}dual slope{"} effect on the yield is compared for 32nm HK/MG planar and FinFET 32M SRAMs with high (HD) and low doping (LD). Under the {"}dual slope{"} effect, the channel length adjustment method for pass gate transistor is proposed to reduce Vccmin of FinFET SRAM. When the number of finis is 1:2:2(=PU:PG:PD), HD and LD 32M FinFET SRAMs improve Vccmin by 370mV and 500mV, respectively, compared to 32M planar counterparts using the proposed the channel length adjustment method. Effect of NBTI and PBTI on Vccmin is also investigated. BTI degradation is greatly dependent on HK thickness and surface plane orientation of FinFET. End of Life (EOL) Vccmin optimization therefore requires careful selection of HK thickness and surface orientation.",
author = "H. Park and Song, {S. C.} and Woo, {S. H.} and Abu-Rahma, {M. H.} and L. Ge and Kang, {M. G.} and Han, {B. M.} and J. Wang and R. Choi and Yang, {J. W.} and Seongook Jung and G. Yeap",
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Park, H, Song, SC, Woo, SH, Abu-Rahma, MH, Ge, L, Kang, MG, Han, BM, Wang, J, Choi, R, Yang, JW, Jung, S & Yeap, G 2010, Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin. in 2010 IEEE International Reliability Physics Symposium, IRPS 2010., 5488684, IEEE International Reliability Physics Symposium Proceedings, pp. 1008-1013, 2010 IEEE International Reliability Physics Symposium, IRPS 2010, Garden Grove, CA, Canada, 10/5/2. https://doi.org/10.1109/IRPS.2010.5488684

Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin. / Park, H.; Song, S. C.; Woo, S. H.; Abu-Rahma, M. H.; Ge, L.; Kang, M. G.; Han, B. M.; Wang, J.; Choi, R.; Yang, J. W.; Jung, Seongook; Yeap, G.

2010 IEEE International Reliability Physics Symposium, IRPS 2010. 2010. p. 1008-1013 5488684 (IEEE International Reliability Physics Symposium Proceedings).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AU - Woo, S. H.

AU - Abu-Rahma, M. H.

AU - Ge, L.

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AU - Wang, J.

AU - Choi, R.

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N2 - Supply voltage (Vcc) scaling is mostly used method to achieve low power consumption. However, a high Vccmin is required to meet the high target yield because the SRAM yield according to Vcc scaling shows "dual slope". In this paper, the root causes of "dual slope" are analyzed. Both side effect of SRAM bitcell on the yield is also considered to accurately project Vccmin, which results in 40mV increase of Vccmin to meet 99% target yield for 32nm HK/MG planar 1M SRAM. The "dual slope" effect on the yield is compared for 32nm HK/MG planar and FinFET 32M SRAMs with high (HD) and low doping (LD). Under the "dual slope" effect, the channel length adjustment method for pass gate transistor is proposed to reduce Vccmin of FinFET SRAM. When the number of finis is 1:2:2(=PU:PG:PD), HD and LD 32M FinFET SRAMs improve Vccmin by 370mV and 500mV, respectively, compared to 32M planar counterparts using the proposed the channel length adjustment method. Effect of NBTI and PBTI on Vccmin is also investigated. BTI degradation is greatly dependent on HK thickness and surface plane orientation of FinFET. End of Life (EOL) Vccmin optimization therefore requires careful selection of HK thickness and surface orientation.

AB - Supply voltage (Vcc) scaling is mostly used method to achieve low power consumption. However, a high Vccmin is required to meet the high target yield because the SRAM yield according to Vcc scaling shows "dual slope". In this paper, the root causes of "dual slope" are analyzed. Both side effect of SRAM bitcell on the yield is also considered to accurately project Vccmin, which results in 40mV increase of Vccmin to meet 99% target yield for 32nm HK/MG planar 1M SRAM. The "dual slope" effect on the yield is compared for 32nm HK/MG planar and FinFET 32M SRAMs with high (HD) and low doping (LD). Under the "dual slope" effect, the channel length adjustment method for pass gate transistor is proposed to reduce Vccmin of FinFET SRAM. When the number of finis is 1:2:2(=PU:PG:PD), HD and LD 32M FinFET SRAMs improve Vccmin by 370mV and 500mV, respectively, compared to 32M planar counterparts using the proposed the channel length adjustment method. Effect of NBTI and PBTI on Vccmin is also investigated. BTI degradation is greatly dependent on HK thickness and surface plane orientation of FinFET. End of Life (EOL) Vccmin optimization therefore requires careful selection of HK thickness and surface orientation.

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Park H, Song SC, Woo SH, Abu-Rahma MH, Ge L, Kang MG et al. Accurate projection of Vccmin by modeling "dual slope" in FinFET based SRAM, and impact of long term reliability on end of life V ccmin. In 2010 IEEE International Reliability Physics Symposium, IRPS 2010. 2010. p. 1008-1013. 5488684. (IEEE International Reliability Physics Symposium Proceedings). https://doi.org/10.1109/IRPS.2010.5488684