TY - GEN
T1 - A/D converter using iterative divide-by-two reference for CMOS image sensor
AU - Jeonghwan, Lee
AU - Gunhee, Han
PY - 2008
Y1 - 2008
N2 - This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm2.
AB - This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm2.
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U2 - 10.1109/SOCDC.2008.4815737
DO - 10.1109/SOCDC.2008.4815737
M3 - Conference contribution
AN - SCOPUS:67650659393
SN - 9781424425990
SN - 9781424425990
T3 - 2008 International SoC Design Conference, ISOCC 2008
SP - III35-III36
BT - 2008 International SoC Design Conference, ISOCC 2008
T2 - 2008 International SoC Design Conference, ISOCC 2008
Y2 - 24 November 2008 through 25 November 2008
ER -