A/D converter using iterative divide-by-two reference for CMOS image sensor

Lee Jeonghwan; Han Gunhee

doi:10.1109/SOCDC.2008.4815737

A/D converter using iterative divide-by-two reference for CMOS image sensor

Lee Jeonghwan, Han Gunhee

School of Integrated Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm².

Original language	English
Title of host publication	2008 International SoC Design Conference, ISOCC 2008
Pages	III35-III36
DOIs	https://doi.org/10.1109/SOCDC.2008.4815737
Publication status	Published - 2008
Event	2008 International SoC Design Conference, ISOCC 2008 - Busan, Korea, Republic of Duration: 2008 Nov 24 → 2008 Nov 25

Publication series

Name	2008 International SoC Design Conference, ISOCC 2008
Volume	3

Other

Other	2008 International SoC Design Conference, ISOCC 2008
Country	Korea, Republic of
City	Busan
Period	08/11/24 → 08/11/25

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Software

Access to Document

10.1109/SOCDC.2008.4815737

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Cite this

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title = "A/D converter using iterative divide-by-two reference for CMOS image sensor",

abstract = "This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm2.",

author = "Lee Jeonghwan and Han Gunhee",

year = "2008",

doi = "10.1109/SOCDC.2008.4815737",

language = "English",

isbn = "9781424425990",

series = "2008 International SoC Design Conference, ISOCC 2008",

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booktitle = "2008 International SoC Design Conference, ISOCC 2008",

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Jeonghwan, L & Gunhee, H 2008, A/D converter using iterative divide-by-two reference for CMOS image sensor. in 2008 International SoC Design Conference, ISOCC 2008., 4815737, 2008 International SoC Design Conference, ISOCC 2008, vol. 3, pp. III35-III36, 2008 International SoC Design Conference, ISOCC 2008, Busan, Korea, Republic of, 08/11/24. https://doi.org/10.1109/SOCDC.2008.4815737

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AU - Jeonghwan, Lee

AU - Gunhee, Han

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N2 - This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm2.

AB - This paper proposes an ADC using Iterative Divide-by-Two Reference. Using and sharing a single voltage divider reduces silicon area for a column compared with the conventional SA-ADC. An offset-cancelled integrator and a capacitor error averaging method are implemented to decrease the impact of nonlinearities. The ADC is designed in 0.18-μm CMOS process and consumes 0.35-mW of power per ADC, and the active die area is 0.012-mm2.

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T2 - 2008 International SoC Design Conference, ISOCC 2008

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