This paper proposes a defective pixel detection algorithm for CCD/CMOS image sensors and its hardware architecture. In previous algorithms, the characteristics of images have not been considered and normal pixels can be treated as defective pixels with high possibility. In order to make up for those disadvantages, the proposed algorithm detects defective pixels by considering the characteristics of the image and verifies them using several frames while checking scene-changes. Whenever a scene-change is occurred, potentially defective pixels are detected and verified. The proposed algorithm was implemented with Verilog HDL. Total logic gate count was 5.1k using 0.25um CMOS standard cell library.