Abstract
This paper presents an advanced PCM-Flash hybrid memory structure for the integrated memory-disk (IMD) structure merging the conventional main memory and disk storage into a single memory layer. The proposed structure can enhance overall write access latency of PCM (phase change memory)-Flash hybrid array and the amount of sequentially allocated data onto physical Flash memory area by applying PCM preference write policy and also designing additional page packing module. Thus, these two modules can maximize the use of PCM memory space to achieve both fast access latency and high Flash endurance by aggressively bounding adjacent pages. Thus, our advanced PCM-Flash hybrid memory structure can provide optimal performance by considering intrinsic characteristics of PCM and Flash memory devices and overcome PCM and Flash asymmetric access latency gap via PCM preference write policy. Our experimental results show that energy consumption of our advanced PCM-Flash hybrid memory structure can be improved by around 39%, and access latency can be reduced by 45%, compared to the basic model.
| Original language | English |
|---|---|
| Title of host publication | Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1045-1050 |
| Number of pages | 6 |
| ISBN (Electronic) | 9781479989362 |
| DOIs | |
| Publication status | Published - 2015 Nov 23 |
| Event | 17th IEEE International Conference on High Performance Computing and Communications, IEEE 7th International Symposium on Cyberspace Safety and Security and IEEE 12th International Conference on Embedded Software and Systems, HPCC-ICESS-CSS 2015 - New York, United States Duration: 2015 Aug 24 → 2015 Aug 26 |
Publication series
| Name | Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015 |
|---|
Other
| Other | 17th IEEE International Conference on High Performance Computing and Communications, IEEE 7th International Symposium on Cyberspace Safety and Security and IEEE 12th International Conference on Embedded Software and Systems, HPCC-ICESS-CSS 2015 |
|---|---|
| Country | United States |
| City | New York |
| Period | 15/8/24 → 15/8/26 |
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All Science Journal Classification (ASJC) codes
- Software
- Control and Systems Engineering
- Computer Networks and Communications
Cite this
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Adaptive page packing and storing method for PCM-flash hybrid memory structure. / Yoon, Su Kyung; Youn, Young Sun; Kim, Shin-Dug.
Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 1045-1050 7336307 (Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Adaptive page packing and storing method for PCM-flash hybrid memory structure
AU - Yoon, Su Kyung
AU - Youn, Young Sun
AU - Kim, Shin-Dug
PY - 2015/11/23
Y1 - 2015/11/23
N2 - This paper presents an advanced PCM-Flash hybrid memory structure for the integrated memory-disk (IMD) structure merging the conventional main memory and disk storage into a single memory layer. The proposed structure can enhance overall write access latency of PCM (phase change memory)-Flash hybrid array and the amount of sequentially allocated data onto physical Flash memory area by applying PCM preference write policy and also designing additional page packing module. Thus, these two modules can maximize the use of PCM memory space to achieve both fast access latency and high Flash endurance by aggressively bounding adjacent pages. Thus, our advanced PCM-Flash hybrid memory structure can provide optimal performance by considering intrinsic characteristics of PCM and Flash memory devices and overcome PCM and Flash asymmetric access latency gap via PCM preference write policy. Our experimental results show that energy consumption of our advanced PCM-Flash hybrid memory structure can be improved by around 39%, and access latency can be reduced by 45%, compared to the basic model.
AB - This paper presents an advanced PCM-Flash hybrid memory structure for the integrated memory-disk (IMD) structure merging the conventional main memory and disk storage into a single memory layer. The proposed structure can enhance overall write access latency of PCM (phase change memory)-Flash hybrid array and the amount of sequentially allocated data onto physical Flash memory area by applying PCM preference write policy and also designing additional page packing module. Thus, these two modules can maximize the use of PCM memory space to achieve both fast access latency and high Flash endurance by aggressively bounding adjacent pages. Thus, our advanced PCM-Flash hybrid memory structure can provide optimal performance by considering intrinsic characteristics of PCM and Flash memory devices and overcome PCM and Flash asymmetric access latency gap via PCM preference write policy. Our experimental results show that energy consumption of our advanced PCM-Flash hybrid memory structure can be improved by around 39%, and access latency can be reduced by 45%, compared to the basic model.
UR - http://www.scopus.com/inward/record.url?scp=84961762917&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84961762917&partnerID=8YFLogxK
U2 - 10.1109/HPCC-CSS-ICESS.2015.152
DO - 10.1109/HPCC-CSS-ICESS.2015.152
M3 - Conference contribution
T3 - Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015
SP - 1045
EP - 1050
BT - Proceedings - 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security and 2015 IEEE 12th International Conference on Embedded Software and Systems, HPCC-CSS-ICESS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
ER -