Adaptive parallel system as the high performance parallel architecture

Jeong Min Kim, Youngsik Kim, Shin-Dug Kim, Tack-Don Han, Sung-Bong Yang

Research output: Contribution to conferencePaper

Abstract

An approach for designing a hybrid parallel system that can be performed adaptively for different types of parallelism is presented. An adaptive parallel system (APS) is proposed to attain this goal. The APS is constructed by integrating tightly two different types of parallel architectures, i.e., a multiprocessor system and a memory based processor array (MPA), into a single machine. The multiprocessor and the MPA can execute medium to coarse grain parallelism and fine grain data parallelism optimally. One important feature in the APS is that the programming interface is the same as the usual subroutine call mechanism to execute data parallel code onto the MPA. Thus the existence of the MPA is transparent to the programmers. This research is to design an underlying base architecture that can be optimally executed for a broad range of applications, from coarse grain to fine grain parallelisms. Also the performance model is provided for fair comparison with other approaches. It turns out that the proposed APS can provide significant performance improvement and cost effectiveness for highly parallel applications having a mixed set of parallelisms.

Original languageEnglish
Pages557-562
Number of pages6
Publication statusPublished - 1997 Jan 1
EventProceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97 - Seoul, South Korea
Duration: 1997 Apr 281997 May 2

Other

OtherProceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97
CitySeoul, South Korea
Period97/4/2897/5/2

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Parallel architectures
Parallel processing systems
Data storage equipment
Subroutines
Cost effectiveness
Computer programming
Interfaces (computer)
Computer systems

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Cite this

Kim, J. M., Kim, Y., Kim, S-D., Han, T-D., & Yang, S-B. (1997). Adaptive parallel system as the high performance parallel architecture. 557-562. Paper presented at Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97, Seoul, South Korea, .
Kim, Jeong Min ; Kim, Youngsik ; Kim, Shin-Dug ; Han, Tack-Don ; Yang, Sung-Bong. / Adaptive parallel system as the high performance parallel architecture. Paper presented at Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97, Seoul, South Korea, .6 p.
@conference{465f85734ee9441998e57e3049041d7a,
title = "Adaptive parallel system as the high performance parallel architecture",
abstract = "An approach for designing a hybrid parallel system that can be performed adaptively for different types of parallelism is presented. An adaptive parallel system (APS) is proposed to attain this goal. The APS is constructed by integrating tightly two different types of parallel architectures, i.e., a multiprocessor system and a memory based processor array (MPA), into a single machine. The multiprocessor and the MPA can execute medium to coarse grain parallelism and fine grain data parallelism optimally. One important feature in the APS is that the programming interface is the same as the usual subroutine call mechanism to execute data parallel code onto the MPA. Thus the existence of the MPA is transparent to the programmers. This research is to design an underlying base architecture that can be optimally executed for a broad range of applications, from coarse grain to fine grain parallelisms. Also the performance model is provided for fair comparison with other approaches. It turns out that the proposed APS can provide significant performance improvement and cost effectiveness for highly parallel applications having a mixed set of parallelisms.",
author = "Kim, {Jeong Min} and Youngsik Kim and Shin-Dug Kim and Tack-Don Han and Sung-Bong Yang",
year = "1997",
month = "1",
day = "1",
language = "English",
pages = "557--562",
note = "Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97 ; Conference date: 28-04-1997 Through 02-05-1997",

}

Kim, JM, Kim, Y, Kim, S-D, Han, T-D & Yang, S-B 1997, 'Adaptive parallel system as the high performance parallel architecture' Paper presented at Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97, Seoul, South Korea, 97/4/28 - 97/5/2, pp. 557-562.

Adaptive parallel system as the high performance parallel architecture. / Kim, Jeong Min; Kim, Youngsik; Kim, Shin-Dug; Han, Tack-Don; Yang, Sung-Bong.

1997. 557-562 Paper presented at Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97, Seoul, South Korea, .

Research output: Contribution to conferencePaper

TY - CONF

T1 - Adaptive parallel system as the high performance parallel architecture

AU - Kim, Jeong Min

AU - Kim, Youngsik

AU - Kim, Shin-Dug

AU - Han, Tack-Don

AU - Yang, Sung-Bong

PY - 1997/1/1

Y1 - 1997/1/1

N2 - An approach for designing a hybrid parallel system that can be performed adaptively for different types of parallelism is presented. An adaptive parallel system (APS) is proposed to attain this goal. The APS is constructed by integrating tightly two different types of parallel architectures, i.e., a multiprocessor system and a memory based processor array (MPA), into a single machine. The multiprocessor and the MPA can execute medium to coarse grain parallelism and fine grain data parallelism optimally. One important feature in the APS is that the programming interface is the same as the usual subroutine call mechanism to execute data parallel code onto the MPA. Thus the existence of the MPA is transparent to the programmers. This research is to design an underlying base architecture that can be optimally executed for a broad range of applications, from coarse grain to fine grain parallelisms. Also the performance model is provided for fair comparison with other approaches. It turns out that the proposed APS can provide significant performance improvement and cost effectiveness for highly parallel applications having a mixed set of parallelisms.

AB - An approach for designing a hybrid parallel system that can be performed adaptively for different types of parallelism is presented. An adaptive parallel system (APS) is proposed to attain this goal. The APS is constructed by integrating tightly two different types of parallel architectures, i.e., a multiprocessor system and a memory based processor array (MPA), into a single machine. The multiprocessor and the MPA can execute medium to coarse grain parallelism and fine grain data parallelism optimally. One important feature in the APS is that the programming interface is the same as the usual subroutine call mechanism to execute data parallel code onto the MPA. Thus the existence of the MPA is transparent to the programmers. This research is to design an underlying base architecture that can be optimally executed for a broad range of applications, from coarse grain to fine grain parallelisms. Also the performance model is provided for fair comparison with other approaches. It turns out that the proposed APS can provide significant performance improvement and cost effectiveness for highly parallel applications having a mixed set of parallelisms.

UR - http://www.scopus.com/inward/record.url?scp=0030644049&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030644049&partnerID=8YFLogxK

M3 - Paper

SP - 557

EP - 562

ER -

Kim JM, Kim Y, Kim S-D, Han T-D, Yang S-B. Adaptive parallel system as the high performance parallel architecture. 1997. Paper presented at Proceedings of the 1997 2nd High Performance Computing on the Information Superhighway, HPC Asia'97, Seoul, South Korea, .