AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments

Byung Su Kim, Hyo Sig Won, Taehee Han, Joon Sung Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The optimization of cells and cell combinations used in design is critical to enhance the performance. If frequently used cell combinations are known in advance, a new cell development can be significantly optimized using the cell combinations for chip design. However, extracting frequent cell combinations is an NP hard problem. We propose a new framework, referring as AFSEM, to extract frequent cell combinations for design optimization. To solve this problem, we use a frequent subgraph mining method which is a process of discovering subgraphs. We present an advanced graph modeling and optimized frequent subgraph mining platform for a practical use. The experimental results with various designs demonstrate that the proposed method can discover various types of subcircuits for design optimization with various runtime optimization methods.

Original languageEnglish
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages662-665
Number of pages4
ISBN (Electronic)9781479953400
DOIs
Publication statusPublished - 2016 Jul 29
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: 2016 May 222016 May 25

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2016-July
ISSN (Print)0271-4310

Other

Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
CountryCanada
CityMontreal
Period16/5/2216/5/25

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kim, B. S., Won, H. S., Han, T., & Yang, J. S. (2016). AFSEM: Advanced frequent subcircuit extraction method by graph mining approach for optimized cell library developments. In ISCAS 2016 - IEEE International Symposium on Circuits and Systems (pp. 662-665). [7527327] (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2016-July). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2016.7527327