Amber∗: Enabling precise full-system simulation with detailed modeling of all ssd resources

Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut Kandemir, Myoungsoo Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system. In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of full-systems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.

Original languageEnglish
Title of host publicationProceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018
PublisherIEEE Computer Society
Pages469-481
Number of pages13
ISBN (Electronic)9781538662403
DOIs
Publication statusPublished - 2018 Dec 12
Event51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018 - Fukuoka, Japan
Duration: 2018 Oct 202018 Oct 24

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
Volume2018-October
ISSN (Print)1072-4451

Other

Other51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018
CountryJapan
CityFukuoka
Period18/10/2018/10/24

Fingerprint

Amber
Dynamic random access storage
Firmware
Computer hardware
Program processors
Simulators
System buses
General purpose computers
Network protocols
Dynamic mechanical analysis
Data transfer
Computer networks
Mobile devices
Interfaces (computer)
Engines
Hardware
Data storage equipment
Controllers

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

Cite this

Gouk, D., Kwon, M., Zhang, J., Koh, S., Choi, W., Kim, N. S., ... Jung, M. (2018). Amber∗: Enabling precise full-system simulation with detailed modeling of all ssd resources. In Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018 (pp. 469-481). [8574562] (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; Vol. 2018-October). IEEE Computer Society. https://doi.org/10.1109/MICRO.2018.00045
Gouk, Donghyun ; Kwon, Miryeong ; Zhang, Jie ; Koh, Sungjoon ; Choi, Wonil ; Kim, Nam Sung ; Kandemir, Mahmut ; Jung, Myoungsoo. / Amber∗ : Enabling precise full-system simulation with detailed modeling of all ssd resources. Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018. IEEE Computer Society, 2018. pp. 469-481 (Proceedings of the Annual International Symposium on Microarchitecture, MICRO).
@inproceedings{cbb4b93e7905421e924a000e69487eb8,
title = "Amber∗: Enabling precise full-system simulation with detailed modeling of all ssd resources",
abstract = "SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system. In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of full-systems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.",
author = "Donghyun Gouk and Miryeong Kwon and Jie Zhang and Sungjoon Koh and Wonil Choi and Kim, {Nam Sung} and Mahmut Kandemir and Myoungsoo Jung",
year = "2018",
month = "12",
day = "12",
doi = "10.1109/MICRO.2018.00045",
language = "English",
series = "Proceedings of the Annual International Symposium on Microarchitecture, MICRO",
publisher = "IEEE Computer Society",
pages = "469--481",
booktitle = "Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018",
address = "United States",

}

Gouk, D, Kwon, M, Zhang, J, Koh, S, Choi, W, Kim, NS, Kandemir, M & Jung, M 2018, Amber∗: Enabling precise full-system simulation with detailed modeling of all ssd resources. in Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018., 8574562, Proceedings of the Annual International Symposium on Microarchitecture, MICRO, vol. 2018-October, IEEE Computer Society, pp. 469-481, 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, 18/10/20. https://doi.org/10.1109/MICRO.2018.00045

Amber∗ : Enabling precise full-system simulation with detailed modeling of all ssd resources. / Gouk, Donghyun; Kwon, Miryeong; Zhang, Jie; Koh, Sungjoon; Choi, Wonil; Kim, Nam Sung; Kandemir, Mahmut; Jung, Myoungsoo.

Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018. IEEE Computer Society, 2018. p. 469-481 8574562 (Proceedings of the Annual International Symposium on Microarchitecture, MICRO; Vol. 2018-October).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Amber∗

T2 - Enabling precise full-system simulation with detailed modeling of all ssd resources

AU - Gouk, Donghyun

AU - Kwon, Miryeong

AU - Zhang, Jie

AU - Koh, Sungjoon

AU - Choi, Wonil

AU - Kim, Nam Sung

AU - Kandemir, Mahmut

AU - Jung, Myoungsoo

PY - 2018/12/12

Y1 - 2018/12/12

N2 - SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system. In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of full-systems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.

AB - SSDs become a major storage component in modern memory hierarchies, and SSD research demands exploring future simulation-based studies by integrating SSD subsystems into a full-system environment. However, several challenges exist to model SSDs under a full-system simulations; SSDs are composed upon their own complete system and architecture, which employ all necessary hardware, such as CPUs, DRAM and interconnect network. Employing the hardware components, SSDs also require to have multiple device controllers, internal caches and software modules that respect a wide spectrum of storage interfaces and protocols. These SSD hardware and software are all necessary to incarnate storage subsystems under full-system environment, which can operate in parallel with the host system. In this work, we introduce a new SSD simulation framework, SimpleSSD 2.0, namely Amber, that models embedded CPU cores, DRAMs, and various flash technologies (within an SSD), and operate under the full system simulation environment by enabling a data transfer emulation. Amber also includes full firmware stack, including DRAM cache logic, flash firmware, such as FTL and HIL, and obey diverse standard protocols by revising the host DMA engines and system buses of a popular full system simulator's all functional and timing CPU models (gem5). The proposed simulator can capture the details of dynamic performance and power of embedded cores, DRAMs, firmware and flash under the executions of various OS systems and hardware platforms. Using Amber, we characterize several system-level challenges by simulating different types of full-systems, such as mobile devices and general-purpose computers, and offer comprehensive analyses by comparing passive storage and active storage architectures.

UR - http://www.scopus.com/inward/record.url?scp=85060007200&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85060007200&partnerID=8YFLogxK

U2 - 10.1109/MICRO.2018.00045

DO - 10.1109/MICRO.2018.00045

M3 - Conference contribution

AN - SCOPUS:85060007200

T3 - Proceedings of the Annual International Symposium on Microarchitecture, MICRO

SP - 469

EP - 481

BT - Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018

PB - IEEE Computer Society

ER -

Gouk D, Kwon M, Zhang J, Koh S, Choi W, Kim NS et al. Amber∗: Enabling precise full-system simulation with detailed modeling of all ssd resources. In Proceedings - 51st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018. IEEE Computer Society. 2018. p. 469-481. 8574562. (Proceedings of the Annual International Symposium on Microarchitecture, MICRO). https://doi.org/10.1109/MICRO.2018.00045