An area-efficient interpolation filter using block structure

Kyu Ha Lee, Due Hee Youn, Chungyong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A new interpolation filtering architecture using block structure and look-up table (LUT) is proposed. Using parallel processing inherited from block structure, the filtering rate and the power consumption are lowered, which makes the proposed architecture appropriate for the modulator in mobile communication system. Also, applying the symmetric property of filter coefficients, the LUT size and memory requirement are reduced. The proposed filter architecture is generalized by reconstructing the LUT. As a design result, comparison with the prior LUT-based architectures showed that the proposed filter architecture is more area-efficient.

Original languageEnglish
Title of host publicationICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems
Pages925-928
Number of pages4
Publication statusPublished - 2001 Dec 1
Event8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001 - , Malta
Duration: 2001 Sep 22001 Sep 5

Publication series

NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume2

Other

Other8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001
CountryMalta
Period01/9/201/9/5

Fingerprint

Interpolation
Mobile telecommunication systems
Modulators
Electric power utilization
Data storage equipment
Processing

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Lee, K. H., Youn, D. H., & Lee, C. (2001). An area-efficient interpolation filter using block structure. In ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems (pp. 925-928). [957624] (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2).
Lee, Kyu Ha ; Youn, Due Hee ; Lee, Chungyong. / An area-efficient interpolation filter using block structure. ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems. 2001. pp. 925-928 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).
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Lee, KH, Youn, DH & Lee, C 2001, An area-efficient interpolation filter using block structure. in ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems., 957624, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, vol. 2, pp. 925-928, 8th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2001, Malta, 01/9/2.

An area-efficient interpolation filter using block structure. / Lee, Kyu Ha; Youn, Due Hee; Lee, Chungyong.

ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems. 2001. p. 925-928 957624 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - A new interpolation filtering architecture using block structure and look-up table (LUT) is proposed. Using parallel processing inherited from block structure, the filtering rate and the power consumption are lowered, which makes the proposed architecture appropriate for the modulator in mobile communication system. Also, applying the symmetric property of filter coefficients, the LUT size and memory requirement are reduced. The proposed filter architecture is generalized by reconstructing the LUT. As a design result, comparison with the prior LUT-based architectures showed that the proposed filter architecture is more area-efficient.

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Lee KH, Youn DH, Lee C. An area-efficient interpolation filter using block structure. In ICECS 2001 - 8th IEEE International Conference on Electronics, Circuits and Systems. 2001. p. 925-928. 957624. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).