Abstract
Three-dimensional (3D) memory is widely developed to fulfill the ever-increasing memory densities. For the high reliability of 3D memory, the traditional spare structures that consist of simple rows and columns have a difficulty to maximize the efficiency of spare allocation. Therefore, various spare structures are adopted to achieve a high repair rate improvement for multiple banks memory. However, the previous studies have not proposed any methodology to allocate various spare structures with BIRA. For this reason, a new effective spare allocation methodology for the pre-bond and the post-bond repair is proposed. Also, the methodology can be verified by six representative various spare structures with the sequential allocation BIRA.
Original language | English |
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Title of host publication | Proceedings - International SoC Design Conference 2021, ISOCC 2021 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 429-430 |
Number of pages | 2 |
ISBN (Electronic) | 9781665401746 |
DOIs | |
Publication status | Published - 2021 |
Event | 18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of Duration: 2021 Oct 6 → 2021 Oct 9 |
Publication series
Name | Proceedings - International SoC Design Conference 2021, ISOCC 2021 |
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Conference
Conference | 18th International System-on-Chip Design Conference, ISOCC 2021 |
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Country/Territory | Korea, Republic of |
City | Jeju Island |
Period | 21/10/6 → 21/10/9 |
Bibliographical note
Funding Information:This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea(MSIT) (No. 2019R1A2C3011079).
Publisher Copyright:
© 2021 IEEE.
All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Information Systems
- Hardware and Architecture
- Electrical and Electronic Engineering