An efficient all-digital built-in self-test for chargepump PLL

Junseok Han, Dongsup Song, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Abstract

Analog and mixed-signal testing is becomming an important issue that affects both the time-to-market and product cost of many SoCs. In order to provide an efficient test method for the PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. It uses the change of phase differences generated by selectively alternating the feedback frequency. This BIST can be easily implemented with several counters and combinational logic gates. The simulation results show higher fault coverage than that of previous test methods. Thus it provides an efficient structural test, which is suitable for a production test in terms of an area overhead, a test accessibility, and test time.

Original languageEnglish
Title of host publicationProceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
Pages80-83
Number of pages4
Publication statusPublished - 2004 Dec 1
EventProceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - Fukuoka, Japan
Duration: 2004 Aug 42004 Aug 5

Other

OtherProceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits
CountryJapan
CityFukuoka
Period04/8/404/8/5

Fingerprint

Built-in self test
Phase locked loops
Logic gates
Feedback
Networks (circuits)
Testing
Costs

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Han, J., Song, D., & Kang, S. (2004). An efficient all-digital built-in self-test for chargepump PLL. In Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (pp. 80-83)
Han, Junseok ; Song, Dongsup ; Kang, Sungho. / An efficient all-digital built-in self-test for chargepump PLL. Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. 2004. pp. 80-83
@inproceedings{813ec88099024710b3d05168d448e546,
title = "An efficient all-digital built-in self-test for chargepump PLL",
abstract = "Analog and mixed-signal testing is becomming an important issue that affects both the time-to-market and product cost of many SoCs. In order to provide an efficient test method for the PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. It uses the change of phase differences generated by selectively alternating the feedback frequency. This BIST can be easily implemented with several counters and combinational logic gates. The simulation results show higher fault coverage than that of previous test methods. Thus it provides an efficient structural test, which is suitable for a production test in terms of an area overhead, a test accessibility, and test time.",
author = "Junseok Han and Dongsup Song and Sungho Kang",
year = "2004",
month = "12",
day = "1",
language = "English",
isbn = "078038637X",
pages = "80--83",
booktitle = "Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits",

}

Han, J, Song, D & Kang, S 2004, An efficient all-digital built-in self-test for chargepump PLL. in Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. pp. 80-83, Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, Fukuoka, Japan, 04/8/4.

An efficient all-digital built-in self-test for chargepump PLL. / Han, Junseok; Song, Dongsup; Kang, Sungho.

Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. 2004. p. 80-83.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - An efficient all-digital built-in self-test for chargepump PLL

AU - Han, Junseok

AU - Song, Dongsup

AU - Kang, Sungho

PY - 2004/12/1

Y1 - 2004/12/1

N2 - Analog and mixed-signal testing is becomming an important issue that affects both the time-to-market and product cost of many SoCs. In order to provide an efficient test method for the PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. It uses the change of phase differences generated by selectively alternating the feedback frequency. This BIST can be easily implemented with several counters and combinational logic gates. The simulation results show higher fault coverage than that of previous test methods. Thus it provides an efficient structural test, which is suitable for a production test in terms of an area overhead, a test accessibility, and test time.

AB - Analog and mixed-signal testing is becomming an important issue that affects both the time-to-market and product cost of many SoCs. In order to provide an efficient test method for the PLL which is a mixed-signal circuit widely used in most of SoCs, a novel BIST method is developed. It uses the change of phase differences generated by selectively alternating the feedback frequency. This BIST can be easily implemented with several counters and combinational logic gates. The simulation results show higher fault coverage than that of previous test methods. Thus it provides an efficient structural test, which is suitable for a production test in terms of an area overhead, a test accessibility, and test time.

UR - http://www.scopus.com/inward/record.url?scp=14544271038&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=14544271038&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:14544271038

SN - 078038637X

SP - 80

EP - 83

BT - Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits

ER -

Han J, Song D, Kang S. An efficient all-digital built-in self-test for chargepump PLL. In Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits. 2004. p. 80-83