An in-depth study of next generation interface for emerging non-volatile memories

Wonil Choi, Jie Zhang, Shuwen Gao, Jaesoo Lee, Myoungsoo Jung, Mahmut Kandemir

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Non-Volatile Memory Express (NVMe) is designed with the goal of unlocking the potential of low-latency, randomaccess, memory-based storage devices. Specifically, NVMe employs various rich communication and queuing mechanism that can ideally schedule four billion I/O instructions for a single storage device. To explore NVMe with assorted user scenarios, we model diverse interface-level design parameters such as PCI Express, NVMe protocol, and different rich queuing mechanisms by considering a wide spectrum of host-level system configurations. In this work, we also assemble a comprehensive memory stack with different types of emerging NVM technologies, which can give us detailed NVMe related statistics like I/O request lifespans and I/O thread-related parallelism. Our evaluation results reveal that, i) while NVMe handshaking is light-weight for flash memory that uses block-based accesses (Block NVM), it can impose tremendous overheads for memristor technology (DRAM-like NVM), ii) in contrast to the common expectation, the performance of an NVMe-equipped system may not improve in a scalable fashion as the queue depth and the number of queues increase, and iii) more- and deeperqueue systems atop a Block NVM can significantly suffer from tremendous host-side memory requirements, whereas a DRAMlike NVM can cause frequent system stalls due to NVMe's inefficient interrupt service routine.

Original languageEnglish
Title of host publication2016 5th Non-Volatile Memory Systems and Applications Symposium, NVMSA 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509041367
DOIs
Publication statusPublished - 2016 Aug 17
Event5th Non-Volatile Memory Systems and Applications Symposium, NVMSA 2016 - Daegu, Korea, Republic of
Duration: 2016 Aug 172016 Aug 19

Publication series

Name2016 5th Non-Volatile Memory Systems and Applications Symposium, NVMSA 2016

Other

Other5th Non-Volatile Memory Systems and Applications Symposium, NVMSA 2016
Country/TerritoryKorea, Republic of
CityDaegu
Period16/8/1716/8/19

Bibliographical note

Funding Information:
This research is supported in part by NRF grants 2016R1C1B2015312, 2015M3C4A7065645, and IITP grant, 2015-R0346-15-1008. This work is also supported in part by NSF grants 1213052, 1205618, 1302557, 1526750, 1409095, and 1439021. Mahmut Kandemir and Myoungsoo Jung are the co-corresponding authors.

Publisher Copyright:
© 2016 IEEE.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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