An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology

Jin Sung Youn, Myung Jae Lee, Kang Yeob Park, Holger Rücker, Woo Young Choi

Research output: Contribution to journalArticle

15 Citations (Scopus)

Abstract

An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 231-1 pseudorandom bit sequence optical data with the bit-error rate less than 10-12 at incident optical power of -7 dBm. The OEIC core has 1000 μm × 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

Original languageEnglish
Pages (from-to)28153-28162
Number of pages10
JournalOptics Express
Volume20
Issue number27
DOIs
Publication statusPublished - 2012 Dec 17

Fingerprint

avalanches
integrated circuits
photometers
receivers
silicon
amplifiers
optical interconnects
power efficiency
bit error rate
buffers
direct current
chips
sensitivity

All Science Journal Classification (ASJC) codes

  • Atomic and Molecular Physics, and Optics

Cite this

Youn, Jin Sung ; Lee, Myung Jae ; Park, Kang Yeob ; Rücker, Holger ; Choi, Woo Young. / An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology. In: Optics Express. 2012 ; Vol. 20, No. 27. pp. 28153-28162.
@article{31bca374bf4e4d78bb2d9ca7bca8ace2,
title = "An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology",
abstract = "An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 231-1 pseudorandom bit sequence optical data with the bit-error rate less than 10-12 at incident optical power of -7 dBm. The OEIC core has 1000 μm × 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.",
author = "Youn, {Jin Sung} and Lee, {Myung Jae} and Park, {Kang Yeob} and Holger R{\"u}cker and Choi, {Woo Young}",
year = "2012",
month = "12",
day = "17",
doi = "10.1364/OE.20.028153",
language = "English",
volume = "20",
pages = "28153--28162",
journal = "Optics Express",
issn = "1094-4087",
publisher = "The Optical Society",
number = "27",

}

An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology. / Youn, Jin Sung; Lee, Myung Jae; Park, Kang Yeob; Rücker, Holger; Choi, Woo Young.

In: Optics Express, Vol. 20, No. 27, 17.12.2012, p. 28153-28162.

Research output: Contribution to journalArticle

TY - JOUR

T1 - An integrated 12.5-Gb/s optoelectronic receiver with a silicon avalanche photodetector in standard SiGe BiCMOS technology

AU - Youn, Jin Sung

AU - Lee, Myung Jae

AU - Park, Kang Yeob

AU - Rücker, Holger

AU - Choi, Woo Young

PY - 2012/12/17

Y1 - 2012/12/17

N2 - An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 231-1 pseudorandom bit sequence optical data with the bit-error rate less than 10-12 at incident optical power of -7 dBm. The OEIC core has 1000 μm × 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

AB - An optoelectronic integrated circuit (OEIC) receiver is realized with standard 0.25-μm SiGe BiCMOS technology for 850-nm optical interconnect applications. The OEIC receiver consists of a Si avalanche photodetector, a transimpedance amplifier with a DC-balanced buffer, a tunable equalizer, and a limiting amplifier. The fabricated OEIC receiver successfully detects 12.5-Gb/s 231-1 pseudorandom bit sequence optical data with the bit-error rate less than 10-12 at incident optical power of -7 dBm. The OEIC core has 1000 μm × 280 μm chip area, and consumes 59 mW from 2.5-V supply. To the best of our knowledge, this OEIC receiver achieves the highest data rate with the smallest sensitivity as well as the best power efficiency among integrated OEIC receivers fabricated with standard Si technology.

UR - http://www.scopus.com/inward/record.url?scp=84872037707&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84872037707&partnerID=8YFLogxK

U2 - 10.1364/OE.20.028153

DO - 10.1364/OE.20.028153

M3 - Article

C2 - 23263050

AN - SCOPUS:84872037707

VL - 20

SP - 28153

EP - 28162

JO - Optics Express

JF - Optics Express

SN - 1094-4087

IS - 27

ER -