An I/Q channel time-interleaved band-pass sigma-delta modulator for a low-IF receiver

Minho Kwon, Gunhee Han

Research output: Contribution to journalConference article

4 Citations (Scopus)

Abstract

This paper proposes a multiplexing scheme to realize an I/Q channel time-interleaved (TI) band-pass sigma-delta modulator (BPSDM) that shares OTAs to minimize power consumption and silicon area for a low-IF wireless receiver. The test chip was fabricated for a 10.7-MHz IF system with a 0.35-μm CMOS process. The measured peak SNDR for a 200-kHz bandwidth is approximately 73 dB. The power consumption of the fabricated chip is 61 mW with a 3.3-V supply and the silicon area is 1.78 mm2.

Original languageEnglish
Article number4252557
Pages (from-to)5-8
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Publication statusPublished - 2007 Sep 27
Event2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States
Duration: 2007 May 272007 May 30

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Silicon
Modulators
Electric power utilization
Multiplexing
Bandwidth

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

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abstract = "This paper proposes a multiplexing scheme to realize an I/Q channel time-interleaved (TI) band-pass sigma-delta modulator (BPSDM) that shares OTAs to minimize power consumption and silicon area for a low-IF wireless receiver. The test chip was fabricated for a 10.7-MHz IF system with a 0.35-μm CMOS process. The measured peak SNDR for a 200-kHz bandwidth is approximately 73 dB. The power consumption of the fabricated chip is 61 mW with a 3.3-V supply and the silicon area is 1.78 mm2.",
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AB - This paper proposes a multiplexing scheme to realize an I/Q channel time-interleaved (TI) band-pass sigma-delta modulator (BPSDM) that shares OTAs to minimize power consumption and silicon area for a low-IF wireless receiver. The test chip was fabricated for a 10.7-MHz IF system with a 0.35-μm CMOS process. The measured peak SNDR for a 200-kHz bandwidth is approximately 73 dB. The power consumption of the fabricated chip is 61 mW with a 3.3-V supply and the silicon area is 1.78 mm2.

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