Analysis of a novel Elevated Source Drain MOSFET with reduced gate-induced drain-leakage current

Kyung Whan Kim, Chang Soon Choi, Woo Young Choi

Research output: Contribution to conferencePaper

1 Citation (Scopus)


A new self-aligned ESD (Elevated Source Drain) MOSFET structure which can effectively reduce the GIDL (Gate-Induced Drain Leakage) current is proposed and analyzed. Proposed ESD structure is characterized by sidewall spacer width (WS) and recessed-channel depth (XR) which are determined by dry-etching process. Elevation of the Source/Drain extension region is realized so that the low-activation effect caused by low-energy ion implantation can be avoided. The GIDL current in the proposed ESD structure is reduced as the region with the peak electric field is shifted toward the drain side.

Original languageEnglish
Number of pages4
Publication statusPublished - 2000 Dec 1


All Science Journal Classification (ASJC) codes

  • Engineering(all)

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