Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM

Suk Min Kim, Byungkyu Song, Tae Woo Oh, Seong Ook Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Various types of sense amplifiers are widely used in memory products. In this paper, we have studied on the optimization of a voltage latched sense amplifier (VLSA) with 65nm CMOS process for low-power DRAM. In particular, we have classified sensing failure into the offset failure and the latch-delay failure, and have found that the latch-delay failure becomes even worse at low supply voltages below 1.0V. We also found that conventional NMOS-driven sensing operation was no longer effective on VLSA for low supply voltage, and investigated various methods to decrease the latch-delay failure probability.

Original languageEnglish
Title of host publicationPRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages65-68
Number of pages4
ISBN (Print)9781538653869
DOIs
Publication statusPublished - 2018 Aug 8
Event14th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2018 - Prague, Czech Republic
Duration: 2018 Jul 22018 Jul 5

Other

Other14th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2018
CountryCzech Republic
CityPrague
Period18/7/218/7/5

Fingerprint

Dynamic random access storage
latches
amplifiers
Electric potential
electric potential
CMOS
Data storage equipment
optimization
products

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Instrumentation

Cite this

Kim, S. M., Song, B., Oh, T. W., & Jung, S. O. (2018). Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM. In PRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics (pp. 65-68). [8430359] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PRIME.2018.8430359
Kim, Suk Min ; Song, Byungkyu ; Oh, Tae Woo ; Jung, Seong Ook. / Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM. PRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics. Institute of Electrical and Electronics Engineers Inc., 2018. pp. 65-68
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title = "Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM",
abstract = "Various types of sense amplifiers are widely used in memory products. In this paper, we have studied on the optimization of a voltage latched sense amplifier (VLSA) with 65nm CMOS process for low-power DRAM. In particular, we have classified sensing failure into the offset failure and the latch-delay failure, and have found that the latch-delay failure becomes even worse at low supply voltages below 1.0V. We also found that conventional NMOS-driven sensing operation was no longer effective on VLSA for low supply voltage, and investigated various methods to decrease the latch-delay failure probability.",
author = "Kim, {Suk Min} and Byungkyu Song and Oh, {Tae Woo} and Jung, {Seong Ook}",
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Kim, SM, Song, B, Oh, TW & Jung, SO 2018, Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM. in PRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics., 8430359, Institute of Electrical and Electronics Engineers Inc., pp. 65-68, 14th Conference on Ph.D. Research in Microelectronics and Electronics, PRIME 2018, Prague, Czech Republic, 18/7/2. https://doi.org/10.1109/PRIME.2018.8430359

Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM. / Kim, Suk Min; Song, Byungkyu; Oh, Tae Woo; Jung, Seong Ook.

PRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics. Institute of Electrical and Electronics Engineers Inc., 2018. p. 65-68 8430359.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - Various types of sense amplifiers are widely used in memory products. In this paper, we have studied on the optimization of a voltage latched sense amplifier (VLSA) with 65nm CMOS process for low-power DRAM. In particular, we have classified sensing failure into the offset failure and the latch-delay failure, and have found that the latch-delay failure becomes even worse at low supply voltages below 1.0V. We also found that conventional NMOS-driven sensing operation was no longer effective on VLSA for low supply voltage, and investigated various methods to decrease the latch-delay failure probability.

AB - Various types of sense amplifiers are widely used in memory products. In this paper, we have studied on the optimization of a voltage latched sense amplifier (VLSA) with 65nm CMOS process for low-power DRAM. In particular, we have classified sensing failure into the offset failure and the latch-delay failure, and have found that the latch-delay failure becomes even worse at low supply voltages below 1.0V. We also found that conventional NMOS-driven sensing operation was no longer effective on VLSA for low supply voltage, and investigated various methods to decrease the latch-delay failure probability.

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Kim SM, Song B, Oh TW, Jung SO. Analysis on Sensing Yield of Voltage Latched Sense Amplifier for Low Power DRAM. In PRIME 2018 - 14th Conference on Ph.D. Research in Microelectronics and Electronics. Institute of Electrical and Electronics Engineers Inc. 2018. p. 65-68. 8430359 https://doi.org/10.1109/PRIME.2018.8430359