Annealing temperature dependence on the positive bias stability of IGZO thin-film transistors

Hyun Soo Shin, Byung du Ahn, You Seung Rim, Hyun Jae Kim

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The threshold voltage shift (Δ V th) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at 700°C. The degradation of the saturation mobility (μ sat) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at 700°C, it showed a smaller Δ V th under PBS conditions for 10 4 s than the samples that were annealed at 500°C, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at 600°C showed the best performance and the smallest Δ V th among the fabricated samples with a μ sat of 9.38 cm 2/V s, an S-factor of 0.46 V/decade, and a Δ V th of 0.009 V, which is due to the passivation of the defects by high thermal annealing without structural change.

Original languageEnglish
Pages (from-to)209-212
Number of pages4
JournalJournal of Information Display
Issue number4
Publication statusPublished - 2011 Dec 1


All Science Journal Classification (ASJC) codes

  • Materials Science(all)
  • Electrical and Electronic Engineering

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