Cell operation in the Near Threshold Voltage (NTV) domain is attracting attention as one of the circuit level low-power implementations circuit. In this domain, cell operation has large delay characteristic compared to Super Threshold Voltage (STV) environment but has high energy efficiency. In order to utilize circuit that operate in Near Threshold Voltage domain, supporting of Computer-Aided Design(CAD) is essential. There are many recently work about design methodology to apply NTV circuit. Although design methodology exploration in the NTV area has been actively studied, it is difficult to immediately commercialize the research at CAD flow due to modified design methodology. In this work, we propose asymmetric slew logic threshold optimization on NTV without modifying CAD flow. Our proposed approach achieves 9.07%, 11.30% and 9.06% improvement in accuracy in stage delay, stage slew and path delay, respectively, compared to the existing symmetric slew logic threshold method.
|Title of host publication||Proceedings of 2018 7th International Conference on Software and Computer Applications, ICSCA 2018|
|Publisher||Association for Computing Machinery|
|Number of pages||5|
|Publication status||Published - 2018 Feb 8|
|Event||7th International Conference on Software and Computer Applications, ICSCA 2018 - Kuantan, Malaysia|
Duration: 2018 Feb 8 → 2018 Feb 10
|Name||ACM International Conference Proceeding Series|
|Other||7th International Conference on Software and Computer Applications, ICSCA 2018|
|Period||18/2/8 → 18/2/10|
Bibliographical notePublisher Copyright:
© 2018 Association for Computing Machinery.
All Science Journal Classification (ASJC) codes
- Human-Computer Interaction
- Computer Vision and Pattern Recognition
- Computer Networks and Communications