TY - GEN
T1 - Automated selection of signals to observe for efficient silicon debug
AU - Yang, Joon Sung
AU - Touba, Nur A.
PY - 2009
Y1 - 2009
N2 - Internal signals of a circuit are observed to analyze, understand, and debug nonconforming chip behavior. The number of signals that can be observed is limited by bandwidth and storage requirements. This paper presents an automated procedure to select which signals to observe to facilitate early detection of circuit malfunction to help find the root cause of a bug. This paper exploits the nature of error propagation in sequential circuits by observing signals which are most often sensitized to possible errors. Given a functional input vector set, an error transmission matrix is generated by analyzing which flip-flops are sensitized to other flip-flops. Signal observability is enhanced by merging data from relatively independent flip-flops. The final set of signals to observe is determined through integer linear programming (ILP) which provides a set of locations that maximally cover the possible error sites within given constraints. Experimental results indicate that the cycle in which a bug first appears can be more rapidly and precisely found with the proposed approach thereby speeding up the post-silicon debug process.
AB - Internal signals of a circuit are observed to analyze, understand, and debug nonconforming chip behavior. The number of signals that can be observed is limited by bandwidth and storage requirements. This paper presents an automated procedure to select which signals to observe to facilitate early detection of circuit malfunction to help find the root cause of a bug. This paper exploits the nature of error propagation in sequential circuits by observing signals which are most often sensitized to possible errors. Given a functional input vector set, an error transmission matrix is generated by analyzing which flip-flops are sensitized to other flip-flops. Signal observability is enhanced by merging data from relatively independent flip-flops. The final set of signals to observe is determined through integer linear programming (ILP) which provides a set of locations that maximally cover the possible error sites within given constraints. Experimental results indicate that the cycle in which a bug first appears can be more rapidly and precisely found with the proposed approach thereby speeding up the post-silicon debug process.
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U2 - 10.1109/VTS.2009.51
DO - 10.1109/VTS.2009.51
M3 - Conference contribution
AN - SCOPUS:70350374210
SN - 9780769535982
T3 - Proceedings of the IEEE VLSI Test Symposium
SP - 79
EP - 84
BT - Proceedings - 2009 27th IEEE VLSI Test Symposium, VTS 2009
T2 - 2009 27th IEEE VLSI Test Symposium, VTS 2009
Y2 - 3 May 2009 through 7 May 2009
ER -