Automated signal selection maximizing circuit coverage for efficient debug

Soon Kwan Kwon, Joon Sung Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As the complexity of chip increases, the importance of post silicon verification is escalated. Trace buffer is a commonly used hardware architecture to achieve an efficient debug process. It is advantageous since it is able to store internal values which are captured during system operation at-speed. However, it cannot store a vast number of signals due to its limited storage. Therefore, it is very important to select appropriate internal signals for efficient debug. In this paper, we propose a new signal selection scheme to detect errors as close as its occurrence cycle.

Original languageEnglish
Title of host publication2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509027439
DOIs
Publication statusPublished - 2017 Jan 3
Event2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016 - Seoul, Korea, Republic of
Duration: 2016 Oct 262016 Oct 28

Publication series

Name2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016

Other

Other2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016
CountryKorea, Republic of
CitySeoul
Period16/10/2616/10/28

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation

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    Kwon, S. K., & Yang, J. S. (2017). Automated signal selection maximizing circuit coverage for efficient debug. In 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016 [7804833] (2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE-Asia.2016.7804833