Automatic error pattern generation for design error detection in a design validation simulation system

Sungho Kang; Stephen A. Szygenda

doi:10.1109/ASIC.1992.270205

Automatic error pattern generation for design error detection in a design validation simulation system

Sungho Kang, Stephen A. Szygenda

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Considering the fact that simulation patterns can detect a different number of design errors, the derivation of efficient simulation patterns is important. Automatic error pattern generation is introduced to generate a set of error simulation pattern which can be used as input stimuli for design error simulation, a design validation tool which provides a measure of simulation coverage. These tools provide a solution to a long standing problem that has limited design options and design cycle time. They also can decrease design and testing costs.

Original language	English
Title of host publication	Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992
Publisher	IEEE Computer Society
Pages	533-536
Number of pages	4
ISBN (Electronic)	0780307682
DOIs	https://doi.org/10.1109/ASIC.1992.270205
Publication status	Published - 1992
Event	5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992 - Rochester, United States Duration: 1992 Sep 21 → 1992 Sep 25

Publication series

Name	Proceedings of International Conference on ASIC
ISSN (Print)	2162-7541
ISSN (Electronic)	2162-755X

Conference

Conference	5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992
Country	United States
City	Rochester
Period	92/9/21 → 92/9/25

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/ASIC.1992.270205

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Cite this

@inproceedings{224e3d62f06046efb2069bbe597936ee,

title = "Automatic error pattern generation for design error detection in a design validation simulation system",

abstract = "Considering the fact that simulation patterns can detect a different number of design errors, the derivation of efficient simulation patterns is important. Automatic error pattern generation is introduced to generate a set of error simulation pattern which can be used as input stimuli for design error simulation, a design validation tool which provides a measure of simulation coverage. These tools provide a solution to a long standing problem that has limited design options and design cycle time. They also can decrease design and testing costs.",

author = "Sungho Kang and Szygenda, {Stephen A.}",

note = "Publisher Copyright: {\textcopyright} 1992 IEEE. Copyright: Copyright 2019 Elsevier B.V., All rights reserved.; 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992 ; Conference date: 21-09-1992 Through 25-09-1992",

year = "1992",

doi = "10.1109/ASIC.1992.270205",

language = "English",

series = "Proceedings of International Conference on ASIC",

publisher = "IEEE Computer Society",

pages = "533--536",

booktitle = "Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992",

address = "United States",

}

Kang, S & Szygenda, SA 1992, Automatic error pattern generation for design error detection in a design validation simulation system. in Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992., 270205, Proceedings of International Conference on ASIC, IEEE Computer Society, pp. 533-536, 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992, Rochester, United States, 92/9/21. https://doi.org/10.1109/ASIC.1992.270205

Automatic error pattern generation for design error detection in a design validation simulation system. / Kang, Sungho; Szygenda, Stephen A.

Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992. IEEE Computer Society, 1992. p. 533-536 270205 (Proceedings of International Conference on ASIC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Automatic error pattern generation for design error detection in a design validation simulation system

AU - Kang, Sungho

AU - Szygenda, Stephen A.

PY - 1992

Y1 - 1992

N2 - Considering the fact that simulation patterns can detect a different number of design errors, the derivation of efficient simulation patterns is important. Automatic error pattern generation is introduced to generate a set of error simulation pattern which can be used as input stimuli for design error simulation, a design validation tool which provides a measure of simulation coverage. These tools provide a solution to a long standing problem that has limited design options and design cycle time. They also can decrease design and testing costs.

AB - Considering the fact that simulation patterns can detect a different number of design errors, the derivation of efficient simulation patterns is important. Automatic error pattern generation is introduced to generate a set of error simulation pattern which can be used as input stimuli for design error simulation, a design validation tool which provides a measure of simulation coverage. These tools provide a solution to a long standing problem that has limited design options and design cycle time. They also can decrease design and testing costs.

UR - http://www.scopus.com/inward/record.url?scp=85065829657&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85065829657&partnerID=8YFLogxK

U2 - 10.1109/ASIC.1992.270205

DO - 10.1109/ASIC.1992.270205

M3 - Conference contribution

AN - SCOPUS:85065829657

T3 - Proceedings of International Conference on ASIC

SP - 533

EP - 536

BT - Proceedings - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992

PB - IEEE Computer Society

T2 - 5th Annual IEEE International ASIC Conference and Exhibit, ASIC 1992

Y2 - 21 September 1992 through 25 September 1992

ER -