Abstract
A pMOS transistor with a switch is used for two purposes in a differential bitline: precharging and preamplifying during a read operation. These functions are realized by alternately changing the connection of the drain of the switching pMOS according to the operating mode. By using the same pMOS for precharging and preamplifying, the variability of a sense amplifier can be tracked, which can effectively reduce the bitline swing for the read operation. Moreover, because of the lowered bitline precharge level in the proposed scheme, the read stability is improved, as compared with that of the conventional scheme. Thus, a higher wordline voltage can be used to further improve the speed. Consequently, the delay and energy in the bitline are reduced by 1.85-5.88 times and 35%-70%, respectively, according to the supply voltage and number of cells per bitline, with a negligible area overhead of 0.9%.
| Original language | English |
|---|---|
| Article number | 7442809 |
| Pages (from-to) | 1059-1063 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 63 |
| Issue number | 11 |
| DOIs | |
| Publication status | Published - 2016 Nov 1 |
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
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Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM. / Jeong, Hanwool; Park, Juhyun; Oh, Tae Woo; Rim, Woojin; Song, Taejoong; Kim, Gyuhong; Won, Hyo Sig; Jung, Seong Ook.
In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 63, No. 11, 7442809, 01.11.2016, p. 1059-1063.Research output: Contribution to journal › Article
TY - JOUR
T1 - Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM
AU - Jeong, Hanwool
AU - Park, Juhyun
AU - Oh, Tae Woo
AU - Rim, Woojin
AU - Song, Taejoong
AU - Kim, Gyuhong
AU - Won, Hyo Sig
AU - Jung, Seong Ook
PY - 2016/11/1
Y1 - 2016/11/1
N2 - A pMOS transistor with a switch is used for two purposes in a differential bitline: precharging and preamplifying during a read operation. These functions are realized by alternately changing the connection of the drain of the switching pMOS according to the operating mode. By using the same pMOS for precharging and preamplifying, the variability of a sense amplifier can be tracked, which can effectively reduce the bitline swing for the read operation. Moreover, because of the lowered bitline precharge level in the proposed scheme, the read stability is improved, as compared with that of the conventional scheme. Thus, a higher wordline voltage can be used to further improve the speed. Consequently, the delay and energy in the bitline are reduced by 1.85-5.88 times and 35%-70%, respectively, according to the supply voltage and number of cells per bitline, with a negligible area overhead of 0.9%.
AB - A pMOS transistor with a switch is used for two purposes in a differential bitline: precharging and preamplifying during a read operation. These functions are realized by alternately changing the connection of the drain of the switching pMOS according to the operating mode. By using the same pMOS for precharging and preamplifying, the variability of a sense amplifier can be tracked, which can effectively reduce the bitline swing for the read operation. Moreover, because of the lowered bitline precharge level in the proposed scheme, the read stability is improved, as compared with that of the conventional scheme. Thus, a higher wordline voltage can be used to further improve the speed. Consequently, the delay and energy in the bitline are reduced by 1.85-5.88 times and 35%-70%, respectively, according to the supply voltage and number of cells per bitline, with a negligible area overhead of 0.9%.
UR - http://www.scopus.com/inward/record.url?scp=84994454836&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84994454836&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2016.2548100
DO - 10.1109/TCSII.2016.2548100
M3 - Article
AN - SCOPUS:84994454836
VL - 63
SP - 1059
EP - 1063
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
SN - 1549-7747
IS - 11
M1 - 7442809
ER -