Bottleneck analysis of a gigabit network interface card

Formal verification approach

Hyun Wook Jin, Ki Seok Bang, Chuck Yoo, Jin Young Choi, Hojung Cha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper addresses how formal verification can be applied to find a bottleneck in a gigabit network interface card that prevents the card from achieving the best possible performance. Finding a bottleneck in a gigabit network interface card is not an easy task because it is equipped with sophisticated hardware components, such as multiple DMA engines and separate CPU and memory. Therefore, the interactions between a network interface card and the host are very complex so that the firmware to manage the interactions is also complicated, which makes the bottleneck analysis very difficult. As an alternative approach of the bottleneck analysis, we specify the firmware in a gigabit network interface card and analyze the behavior of the specification with SPIN. As an example of gigabit network interface cards, Myrinet is used in this paper. We show that SPIN can easily verify whether the Myrinet firmware has a bottleneck once the state transitions inside the firmware are modeled properly.

Original languageEnglish
Title of host publicationModel Checking Software - 9th International SPIN Workshop, Proceedings
PublisherSpringer Verlag
Pages170-186
Number of pages17
ISBN (Print)3540434771, 9783540434771
Publication statusPublished - 2002 Jan 1
Event9th International SPIN Workshop on Model Checking Software, SPIN 2002 - Grenoble, France
Duration: 2002 Apr 112002 Apr 13

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume2318 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other9th International SPIN Workshop on Model Checking Software, SPIN 2002
CountryFrance
CityGrenoble
Period02/4/1102/4/13

Fingerprint

Formal Verification
Firmware
Interfaces (computer)
Dynamic mechanical analysis
State Transition
Interaction
Program processors
Engine
Formal verification
Hardware
Specification
Verify
Engines
Specifications
Data storage equipment
Alternatives

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)

Cite this

Jin, H. W., Bang, K. S., Yoo, C., Choi, J. Y., & Cha, H. (2002). Bottleneck analysis of a gigabit network interface card: Formal verification approach. In Model Checking Software - 9th International SPIN Workshop, Proceedings (pp. 170-186). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 2318 LNCS). Springer Verlag.
Jin, Hyun Wook ; Bang, Ki Seok ; Yoo, Chuck ; Choi, Jin Young ; Cha, Hojung. / Bottleneck analysis of a gigabit network interface card : Formal verification approach. Model Checking Software - 9th International SPIN Workshop, Proceedings. Springer Verlag, 2002. pp. 170-186 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).
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Jin, HW, Bang, KS, Yoo, C, Choi, JY & Cha, H 2002, Bottleneck analysis of a gigabit network interface card: Formal verification approach. in Model Checking Software - 9th International SPIN Workshop, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 2318 LNCS, Springer Verlag, pp. 170-186, 9th International SPIN Workshop on Model Checking Software, SPIN 2002, Grenoble, France, 02/4/11.

Bottleneck analysis of a gigabit network interface card : Formal verification approach. / Jin, Hyun Wook; Bang, Ki Seok; Yoo, Chuck; Choi, Jin Young; Cha, Hojung.

Model Checking Software - 9th International SPIN Workshop, Proceedings. Springer Verlag, 2002. p. 170-186 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 2318 LNCS).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Jin HW, Bang KS, Yoo C, Choi JY, Cha H. Bottleneck analysis of a gigabit network interface card: Formal verification approach. In Model Checking Software - 9th International SPIN Workshop, Proceedings. Springer Verlag. 2002. p. 170-186. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).