Channel strain measurement of Si1-xCx structures: Effects of gate length, source/drain length, and source/drain elevation

Sun Wook Kim, Dae Seop Byun, Mijin Jung, Saurabh Chopra, Yihwan Kim, Jae Hyun Kim, Seung Min Han, Dae Hong Ko, Hoo Jeong Lee

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

This study examined the dimensional effects on the channel strain in transistor structures with epitaxial Si1-xCx stressors embedded in the source/drain region using both nanobeam diffraction and finite element simulations. The sizes of the gate and source/drain exerted a strong influence on the channel strain but in opposite directions: While declining linearly with decreasing source/drain length, the channel strain increases at an escalating rate with decreasing gate length. For source/drain elevation, its effects on the channel strain were found to be quite limited to the top surface region; however, this elevation method could be more effective for short-channel transistors.

Original languageEnglish
Article number066601
JournalApplied Physics Express
Volume6
Issue number6
DOIs
Publication statusPublished - 2013 Jun

All Science Journal Classification (ASJC) codes

  • Engineering(all)
  • Physics and Astronomy(all)

Fingerprint Dive into the research topics of 'Channel strain measurement of Si<sub>1-x</sub>C<sub>x</sub> structures: Effects of gate length, source/drain length, and source/drain elevation'. Together they form a unique fingerprint.

  • Cite this