Characteristics of junctionless charge trap flash memory for 3D stacked NAND flash

Jinho Oh, Heedo Na, Sunghoon Park, Hyunchul Sohn

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

The electrical characteristics of tunnel barrier engineered-charge trap flash (TBE-CTF) memory devices with junctionless (JL) source and drain (S/D) were investigated. The JL structure is composed of an n+-poly-Si based ultra-thin channel and S/D with identical doping concentrations. The band engineered Hf-silicate/Al2O3 tunnel barrier stack was applied to a JL-TBE-CTF memory device in order to enhance the field sensitivity. The Hf-silicate/Al2O3 tunnel barrier, HfO2 trap layer, and Al2O3 blocking layer were deposited by atomic layer deposition. The fabricated device exhibited a large memory window of 9.43 V, as well as high programming and erasing speeds. Moreover, it also showed adequate retention times and endurance properties. Hence, the JL-TBE-CTF memory (which has a low process complexity) is expected to be an appropriate structure for 3D stacked ultra-high density memory applications.

Original languageEnglish
Pages (from-to)6413-6415
Number of pages3
JournalJournal of Nanoscience and Nanotechnology
Volume13
Issue number9
DOIs
Publication statusPublished - 2013 Sep 1

Fingerprint

Flash memory
flash
tunnels
Silicates
Tunnels
traps
Equipment and Supplies
Data storage equipment
silicates
Atomic layer deposition
endurance
atomic layer epitaxy
programming
Polysilicon
Durability
Doping (additives)

All Science Journal Classification (ASJC) codes

  • Bioengineering
  • Chemistry(all)
  • Biomedical Engineering
  • Materials Science(all)
  • Condensed Matter Physics

Cite this

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title = "Characteristics of junctionless charge trap flash memory for 3D stacked NAND flash",
abstract = "The electrical characteristics of tunnel barrier engineered-charge trap flash (TBE-CTF) memory devices with junctionless (JL) source and drain (S/D) were investigated. The JL structure is composed of an n+-poly-Si based ultra-thin channel and S/D with identical doping concentrations. The band engineered Hf-silicate/Al2O3 tunnel barrier stack was applied to a JL-TBE-CTF memory device in order to enhance the field sensitivity. The Hf-silicate/Al2O3 tunnel barrier, HfO2 trap layer, and Al2O3 blocking layer were deposited by atomic layer deposition. The fabricated device exhibited a large memory window of 9.43 V, as well as high programming and erasing speeds. Moreover, it also showed adequate retention times and endurance properties. Hence, the JL-TBE-CTF memory (which has a low process complexity) is expected to be an appropriate structure for 3D stacked ultra-high density memory applications.",
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Characteristics of junctionless charge trap flash memory for 3D stacked NAND flash. / Oh, Jinho; Na, Heedo; Park, Sunghoon; Sohn, Hyunchul.

In: Journal of Nanoscience and Nanotechnology, Vol. 13, No. 9, 01.09.2013, p. 6413-6415.

Research output: Contribution to journalArticle

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AU - Oh, Jinho

AU - Na, Heedo

AU - Park, Sunghoon

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AB - The electrical characteristics of tunnel barrier engineered-charge trap flash (TBE-CTF) memory devices with junctionless (JL) source and drain (S/D) were investigated. The JL structure is composed of an n+-poly-Si based ultra-thin channel and S/D with identical doping concentrations. The band engineered Hf-silicate/Al2O3 tunnel barrier stack was applied to a JL-TBE-CTF memory device in order to enhance the field sensitivity. The Hf-silicate/Al2O3 tunnel barrier, HfO2 trap layer, and Al2O3 blocking layer were deposited by atomic layer deposition. The fabricated device exhibited a large memory window of 9.43 V, as well as high programming and erasing speeds. Moreover, it also showed adequate retention times and endurance properties. Hence, the JL-TBE-CTF memory (which has a low process complexity) is expected to be an appropriate structure for 3D stacked ultra-high density memory applications.

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