Persistent key-value store supports journaling and checkpointing to maintain data consistency and to prevent data loss. However, conventional data consistency mechanisms are not suitable for efficient management of flash memories in SSDs due to that they write the same data twice and induce redundant flash operations. As a result, query processing is delayed by heavy traffics during checkpointing. The checkpointing accompanies many write operations by nature, and a write operation consumes severe time and energy in SSDs; worse, it can introduce the write amplification problem and shorten the lifetime of the flash memory. In this paper, we propose an in-storage checkpointing mechanism, named Check-In, based on the cooperation between the storage engine of a host and the flash translation layer (FTL) of an SSD. Compared to the existing mechanism, our proposed mechanism reduces the tail latency due to checkpointing by 92.1 % and reduces the number of duplicate writes by 94.3 %. Overall, the average throughput and latency are improved by 8.1 % and 10.2 %, respectively.
|Title of host publication||Proceedings - 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture, ISCA 2020|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||14|
|Publication status||Published - 2020 May|
|Event||47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020 - Virtual, Online, Spain|
Duration: 2020 May 30 → 2020 Jun 3
|Name||Proceedings - International Symposium on Computer Architecture|
|Conference||47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020|
|Period||20/5/30 → 20/6/3|
Bibliographical noteFunding Information:
This work was supported by the Memory Division of Samsung Electronics Co., Ltd and by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. NRF-2018R1A2A2A05018941). We also thank Professor Myoungsoo Jung for his valuable feedbacks. W. W. Ro is the corresponding author.
© 2020 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture