Circuit modeling of interdigitated capacitors fabricated by high-K LTCC sheets

Kilhan Kim, Min Su Ahn, Jung Han Kang, Ilgu Yun

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

The circuit modeling of interdigitated capacitors fabricated by high-k low-temperature co-fired ceramic (LTCC) sheets was investigated. The s-parameters of each test structure were measured from 50 MHz to 10 GHz, and the modeling was performed using these measured s-parameters up to the first resonant frequency. Each test structure was divided into appropriate building blocks. The equivalent circuit of each building block was composed based on the partial element equivalent circuit (PEEC) method. Modeling was executed to optimize the parameters in the equivalent circuit of each building block. The validity of the extracted parameters was verified by the predictive modeling for the test structures with different geometry. After that, Monte Carlo analysis and sensitivity analysis were performed based on the extracted parameters. The modeling methodology can allow a device designer to improve the yield and to save time and cost for the design and manufacturing of devices.

Original languageEnglish
Pages (from-to)182-189
Number of pages8
JournalETRI Journal
Volume28
Issue number2
Publication statusPublished - 2006 Jan 1

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Equivalent circuits
Capacitors
Networks (circuits)
Temperature
Sensitivity analysis
Natural frequencies
Geometry
Costs

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Computer Science(all)
  • Electrical and Electronic Engineering

Cite this

Kim, Kilhan ; Ahn, Min Su ; Kang, Jung Han ; Yun, Ilgu. / Circuit modeling of interdigitated capacitors fabricated by high-K LTCC sheets. In: ETRI Journal. 2006 ; Vol. 28, No. 2. pp. 182-189.
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abstract = "The circuit modeling of interdigitated capacitors fabricated by high-k low-temperature co-fired ceramic (LTCC) sheets was investigated. The s-parameters of each test structure were measured from 50 MHz to 10 GHz, and the modeling was performed using these measured s-parameters up to the first resonant frequency. Each test structure was divided into appropriate building blocks. The equivalent circuit of each building block was composed based on the partial element equivalent circuit (PEEC) method. Modeling was executed to optimize the parameters in the equivalent circuit of each building block. The validity of the extracted parameters was verified by the predictive modeling for the test structures with different geometry. After that, Monte Carlo analysis and sensitivity analysis were performed based on the extracted parameters. The modeling methodology can allow a device designer to improve the yield and to save time and cost for the design and manufacturing of devices.",
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Kim, K, Ahn, MS, Kang, JH & Yun, I 2006, 'Circuit modeling of interdigitated capacitors fabricated by high-K LTCC sheets', ETRI Journal, vol. 28, no. 2, pp. 182-189.

Circuit modeling of interdigitated capacitors fabricated by high-K LTCC sheets. / Kim, Kilhan; Ahn, Min Su; Kang, Jung Han; Yun, Ilgu.

In: ETRI Journal, Vol. 28, No. 2, 01.01.2006, p. 182-189.

Research output: Contribution to journalArticle

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