CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction

Brian E. Cossa, Wei Yip Loh, Jungwoo Oh, Greg Smith, Casey Smith, Hemant Adhikari, Barry Sassman, Srivatsan Parthasarathy, Joel Barnett, Prashant Majhi, Robert M. Wallacea, Jiyoung Kim, Raj Jammy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

We demonstrate for the first time Schottky barrier height (SBH) tuning using interfacial SiO 2/high-κ dipoles resulting in SBH ≤ 0.1 eV from the conduction band-edge (CBE) and SBH ≤ 0.2 eV from the valence band-edge (VBE). The near band-edge electron and hole SBHs have been obtained using a dielectric-dipole mitigated (DDM) scheme with single metal on Si junction. By optimizing the dielectric thickness, we obtained effective dipole modulation to the SBH of +0.5 and -0.3 eV for AlO x/SiO 2 and LaO x/SiO 2, respectively, demonstrating reductions in SBH and contact resistance that are necessary for continued enhanced performance in future technology nodes.

Original languageEnglish
Title of host publication2009 Symposium on VLSI Technology, VLSIT 2009
Pages104-105
Number of pages2
Publication statusPublished - 2009 Nov 16
Event2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan
Duration: 2009 Jun 162009 Jun 18

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562

Other

Other2009 Symposium on VLSI Technology, VLSIT 2009
CountryJapan
CityKyoto
Period09/6/1609/6/18

Fingerprint

Contact resistance
Valence bands
Conduction bands
Metals
Tuning
Modulation
Electrons

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Cossa, B. E., Loh, W. Y., Oh, J., Smith, G., Smith, C., Adhikari, H., ... Jammy, R. (2009). CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction. In 2009 Symposium on VLSI Technology, VLSIT 2009 (pp. 104-105). [5200650] (Digest of Technical Papers - Symposium on VLSI Technology).
Cossa, Brian E. ; Loh, Wei Yip ; Oh, Jungwoo ; Smith, Greg ; Smith, Casey ; Adhikari, Hemant ; Sassman, Barry ; Parthasarathy, Srivatsan ; Barnett, Joel ; Majhi, Prashant ; Wallacea, Robert M. ; Kim, Jiyoung ; Jammy, Raj. / CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction. 2009 Symposium on VLSI Technology, VLSIT 2009. 2009. pp. 104-105 (Digest of Technical Papers - Symposium on VLSI Technology).
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abstract = "We demonstrate for the first time Schottky barrier height (SBH) tuning using interfacial SiO 2/high-κ dipoles resulting in SBH ≤ 0.1 eV from the conduction band-edge (CBE) and SBH ≤ 0.2 eV from the valence band-edge (VBE). The near band-edge electron and hole SBHs have been obtained using a dielectric-dipole mitigated (DDM) scheme with single metal on Si junction. By optimizing the dielectric thickness, we obtained effective dipole modulation to the SBH of +0.5 and -0.3 eV for AlO x/SiO 2 and LaO x/SiO 2, respectively, demonstrating reductions in SBH and contact resistance that are necessary for continued enhanced performance in future technology nodes.",
author = "Cossa, {Brian E.} and Loh, {Wei Yip} and Jungwoo Oh and Greg Smith and Casey Smith and Hemant Adhikari and Barry Sassman and Srivatsan Parthasarathy and Joel Barnett and Prashant Majhi and Wallacea, {Robert M.} and Jiyoung Kim and Raj Jammy",
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Cossa, BE, Loh, WY, Oh, J, Smith, G, Smith, C, Adhikari, H, Sassman, B, Parthasarathy, S, Barnett, J, Majhi, P, Wallacea, RM, Kim, J & Jammy, R 2009, CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction. in 2009 Symposium on VLSI Technology, VLSIT 2009., 5200650, Digest of Technical Papers - Symposium on VLSI Technology, pp. 104-105, 2009 Symposium on VLSI Technology, VLSIT 2009, Kyoto, Japan, 09/6/16.

CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction. / Cossa, Brian E.; Loh, Wei Yip; Oh, Jungwoo; Smith, Greg; Smith, Casey; Adhikari, Hemant; Sassman, Barry; Parthasarathy, Srivatsan; Barnett, Joel; Majhi, Prashant; Wallacea, Robert M.; Kim, Jiyoung; Jammy, Raj.

2009 Symposium on VLSI Technology, VLSIT 2009. 2009. p. 104-105 5200650 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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T1 - CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction

AU - Cossa, Brian E.

AU - Loh, Wei Yip

AU - Oh, Jungwoo

AU - Smith, Greg

AU - Smith, Casey

AU - Adhikari, Hemant

AU - Sassman, Barry

AU - Parthasarathy, Srivatsan

AU - Barnett, Joel

AU - Majhi, Prashant

AU - Wallacea, Robert M.

AU - Kim, Jiyoung

AU - Jammy, Raj

PY - 2009/11/16

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N2 - We demonstrate for the first time Schottky barrier height (SBH) tuning using interfacial SiO 2/high-κ dipoles resulting in SBH ≤ 0.1 eV from the conduction band-edge (CBE) and SBH ≤ 0.2 eV from the valence band-edge (VBE). The near band-edge electron and hole SBHs have been obtained using a dielectric-dipole mitigated (DDM) scheme with single metal on Si junction. By optimizing the dielectric thickness, we obtained effective dipole modulation to the SBH of +0.5 and -0.3 eV for AlO x/SiO 2 and LaO x/SiO 2, respectively, demonstrating reductions in SBH and contact resistance that are necessary for continued enhanced performance in future technology nodes.

AB - We demonstrate for the first time Schottky barrier height (SBH) tuning using interfacial SiO 2/high-κ dipoles resulting in SBH ≤ 0.1 eV from the conduction band-edge (CBE) and SBH ≤ 0.2 eV from the valence band-edge (VBE). The near band-edge electron and hole SBHs have been obtained using a dielectric-dipole mitigated (DDM) scheme with single metal on Si junction. By optimizing the dielectric thickness, we obtained effective dipole modulation to the SBH of +0.5 and -0.3 eV for AlO x/SiO 2 and LaO x/SiO 2, respectively, demonstrating reductions in SBH and contact resistance that are necessary for continued enhanced performance in future technology nodes.

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M3 - Conference contribution

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Cossa BE, Loh WY, Oh J, Smith G, Smith C, Adhikari H et al. CMOS band-edge Schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction. In 2009 Symposium on VLSI Technology, VLSIT 2009. 2009. p. 104-105. 5200650. (Digest of Technical Papers - Symposium on VLSI Technology).