CMOS cryptosystem using a Lorenz chaotic oscillator

Octavio A. Gonzalez; Gunhee Han; Jose Pineda de Gyvez; Edgar Sanchez-Sinencio

CMOS cryptosystem using a Lorenz chaotic oscillator

Octavio A. Gonzalez, Gunhee Han, Jose Pineda de Gyvez, Edgar Sanchez-Sinencio

School of Integrated Technology

Research output: Contribution to journal › Conference article › peer-review

2 Citations (Scopus)

Abstract

This paper presents a monolithic implementation of a cryptosystem based on the Corron and Hahs scheme. The baseband chaotic encryption/decryption system has been designed at the transistor level and fabricated using the AMI1.2 μm CMOS technology available through the MOSIS foundry. While the mathematical model of the Lorenz system is straightforward, its silicon implementation is not. Typical circuit design considerations need to be considered such as the system's dynamic range, internal signal processing mode and basic building blocks all with the intent to provide an optimal design. This paper addresses in detail i) a new generalized Lorenz system of equations suitable for hardware implementations, ii) practical design considerations of the cryptosystem and iii) actual chip-test measurement results that verify theoretical results.

Original language	English
Pages (from-to)	V-442-V-445
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	5
Publication status	Published - 1999
Event	Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 - Orlando, FL, USA Duration: 1999 May 30 → 1999 Jun 2

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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title = "CMOS cryptosystem using a Lorenz chaotic oscillator",

abstract = "This paper presents a monolithic implementation of a cryptosystem based on the Corron and Hahs scheme. The baseband chaotic encryption/decryption system has been designed at the transistor level and fabricated using the AMI1.2 μm CMOS technology available through the MOSIS foundry. While the mathematical model of the Lorenz system is straightforward, its silicon implementation is not. Typical circuit design considerations need to be considered such as the system's dynamic range, internal signal processing mode and basic building blocks all with the intent to provide an optimal design. This paper addresses in detail i) a new generalized Lorenz system of equations suitable for hardware implementations, ii) practical design considerations of the cryptosystem and iii) actual chip-test measurement results that verify theoretical results.",

author = "Gonzalez, {Octavio A.} and Gunhee Han and {Pineda de Gyvez}, Jose and Edgar Sanchez-Sinencio",

note = "Copyright: Copyright 2013 Elsevier B.V., All rights reserved.; Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99 ; Conference date: 30-05-1999 Through 02-06-1999",

year = "1999",

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T1 - CMOS cryptosystem using a Lorenz chaotic oscillator

AU - Gonzalez, Octavio A.

AU - Han, Gunhee

AU - Pineda de Gyvez, Jose

AU - Sanchez-Sinencio, Edgar

PY - 1999

Y1 - 1999

N2 - This paper presents a monolithic implementation of a cryptosystem based on the Corron and Hahs scheme. The baseband chaotic encryption/decryption system has been designed at the transistor level and fabricated using the AMI1.2 μm CMOS technology available through the MOSIS foundry. While the mathematical model of the Lorenz system is straightforward, its silicon implementation is not. Typical circuit design considerations need to be considered such as the system's dynamic range, internal signal processing mode and basic building blocks all with the intent to provide an optimal design. This paper addresses in detail i) a new generalized Lorenz system of equations suitable for hardware implementations, ii) practical design considerations of the cryptosystem and iii) actual chip-test measurement results that verify theoretical results.

AB - This paper presents a monolithic implementation of a cryptosystem based on the Corron and Hahs scheme. The baseband chaotic encryption/decryption system has been designed at the transistor level and fabricated using the AMI1.2 μm CMOS technology available through the MOSIS foundry. While the mathematical model of the Lorenz system is straightforward, its silicon implementation is not. Typical circuit design considerations need to be considered such as the system's dynamic range, internal signal processing mode and basic building blocks all with the intent to provide an optimal design. This paper addresses in detail i) a new generalized Lorenz system of equations suitable for hardware implementations, ii) practical design considerations of the cryptosystem and iii) actual chip-test measurement results that verify theoretical results.

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M3 - Conference article

AN - SCOPUS:0032678396

VL - 5

SP - V-442-V-445

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

SN - 0271-4310

T2 - Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, ISCAS '99

Y2 - 30 May 1999 through 2 June 1999

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