CMOS four quadrant current/transconductance multiplier

Alejandro Diaz-Sanchez; Jaime Ramirez-Angulo; Edgar Sanchez-Sinencio; Gunhee Han

CMOS four quadrant current/transconductance multiplier

Alejandro Diaz-Sanchez, Jaime Ramirez-Angulo, Edgar Sanchez-Sinencio, Gunhee Han

School of Integrated Technology

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based in the square-law characteristic of MOS transistors in saturation region. SPICE simulations with 2 μm CMOS parameters are shown that verify the operation of the circuit.

Original language	English
Pages	237-240
Number of pages	4
Publication status	Published - 1997
Event	Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2) - Sacramento, CA, USA Duration: 1997 Aug 3 → 1997 Aug 6

Other

Other	Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2)
City	Sacramento, CA, USA
Period	97/8/3 → 97/8/6

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'CMOS four quadrant current/transconductance multiplier'. Together they form a unique fingerprint.

Cite this

@conference{891a3d37a77b4e2ba79b5fc8955e3ead,

title = "CMOS four quadrant current/transconductance multiplier",

abstract = "This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based in the square-law characteristic of MOS transistors in saturation region. SPICE simulations with 2 μm CMOS parameters are shown that verify the operation of the circuit.",

author = "Alejandro Diaz-Sanchez and Jaime Ramirez-Angulo and Edgar Sanchez-Sinencio and Gunhee Han",

year = "1997",

language = "English",

pages = "237--240",

note = "Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2) ; Conference date: 03-08-1997 Through 06-08-1997",

}

TY - CONF

T1 - CMOS four quadrant current/transconductance multiplier

AU - Diaz-Sanchez, Alejandro

AU - Ramirez-Angulo, Jaime

AU - Sanchez-Sinencio, Edgar

AU - Han, Gunhee

PY - 1997

Y1 - 1997

N2 - This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based in the square-law characteristic of MOS transistors in saturation region. SPICE simulations with 2 μm CMOS parameters are shown that verify the operation of the circuit.

AB - This paper describes a highly linear current four quadrant multiplier. The circuit is designed to operate in a fully differential way. It is based in the square-law characteristic of MOS transistors in saturation region. SPICE simulations with 2 μm CMOS parameters are shown that verify the operation of the circuit.

UR - http://www.scopus.com/inward/record.url?scp=0031345849&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031345849&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:0031345849

SP - 237

EP - 240

T2 - Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 1 (of 2)

Y2 - 3 August 1997 through 6 August 1997

ER -

CMOS four quadrant current/transconductance multiplier

Abstract

Other

All Science Journal Classification (ASJC) codes

Other files and links

Cite this