Column-parallel single slope ADC with digital correlated multiple sampling for low noise CMOS image sensors

Yue Chen, Albert J.P. Theuwissen, Youngcheol Chae

Research output: Contribution to journalConference article

1 Citation (Scopus)

Abstract

This paper presents a low noise CMOS image sensor (CIS) using 10/12 bit configurable column-parallel single slope ADCs (SS-ADCs) and digital correlated multiple sampling (CMS). The sensor used is a conventional 4T active pixel with a pinned-photodiode as photon detector. The test sensor was fabricated in a 0.18 μm CMOS image sensor process from TSMC. The ADC nonlinearity measurement result shows totally 0.58% nonlinearity. Using the proposed column-parallel SS-ADC with digital CMS technique, 65% random noise reduction is obtained. The significant noise reduction enhances the sensor's SNR with 9 dB.

Original languageEnglish
Pages (from-to)1265-1268
Number of pages4
JournalProcedia Engineering
Volume25
DOIs
Publication statusPublished - 2011 Dec 1
Event25th Eurosensors Conference - Athens, Greece
Duration: 2011 Sep 42011 Sep 7

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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