Abstract
Low power circuit is an important concern for portable and battery operated applications. An attractive method to achieve low power consumption is supply voltage scaling. However, lowering the supply voltage causes a problem of stability in circuit, especially a static random access memory (SRAM). Since the SRAM occupies a large portion of the system-on-a-chip (SoC), the SRAM cell is typically designed using very small transistors for high integration, which causes the large mismatch between transistors in the SRAM cell. Thus, as supply voltage scales down, the static noise margin (SNM) of the 6T SRAM can limit the supply voltage scaling. The stability of read operation is especially sensitive to voltage scaling. To deal with these problems, recently proposed SRAM cells decouple the storage node from the bitline. In this paper, we analyze recently proposed SRAM cells for low voltage operation using 22 nm FinFET model.
| Original language | English |
|---|---|
| Title of host publication | China Semiconductor Technology International Conference 2013, CSTIC 2013 |
| Pages | 93-98 |
| Number of pages | 6 |
| Edition | 1 |
| DOIs | |
| Publication status | Published - 2013 Apr 12 |
| Event | China Semiconductor Technology International Conference 2013, CSTIC 2013 - Shanghai, China Duration: 2013 Mar 19 → 2013 Mar 21 |
Publication series
| Name | ECS Transactions |
|---|---|
| Number | 1 |
| Volume | 52 |
| ISSN (Print) | 1938-5862 |
| ISSN (Electronic) | 1938-6737 |
Other
| Other | China Semiconductor Technology International Conference 2013, CSTIC 2013 |
|---|---|
| Country | China |
| City | Shanghai |
| Period | 13/3/19 → 13/3/21 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
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Comparative study for SRAM cells in near and sub-threshold region. / Yang, Y. H.; Park, J. H.; Song, S. C.; Yang, F.; Wang, J.; Yeap, G.; Jung, S. O.
China Semiconductor Technology International Conference 2013, CSTIC 2013. 1. ed. 2013. p. 93-98 (ECS Transactions; Vol. 52, No. 1).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Comparative study for SRAM cells in near and sub-threshold region
AU - Yang, Y. H.
AU - Park, J. H.
AU - Song, S. C.
AU - Yang, F.
AU - Wang, J.
AU - Yeap, G.
AU - Jung, S. O.
PY - 2013/4/12
Y1 - 2013/4/12
N2 - Low power circuit is an important concern for portable and battery operated applications. An attractive method to achieve low power consumption is supply voltage scaling. However, lowering the supply voltage causes a problem of stability in circuit, especially a static random access memory (SRAM). Since the SRAM occupies a large portion of the system-on-a-chip (SoC), the SRAM cell is typically designed using very small transistors for high integration, which causes the large mismatch between transistors in the SRAM cell. Thus, as supply voltage scales down, the static noise margin (SNM) of the 6T SRAM can limit the supply voltage scaling. The stability of read operation is especially sensitive to voltage scaling. To deal with these problems, recently proposed SRAM cells decouple the storage node from the bitline. In this paper, we analyze recently proposed SRAM cells for low voltage operation using 22 nm FinFET model.
AB - Low power circuit is an important concern for portable and battery operated applications. An attractive method to achieve low power consumption is supply voltage scaling. However, lowering the supply voltage causes a problem of stability in circuit, especially a static random access memory (SRAM). Since the SRAM occupies a large portion of the system-on-a-chip (SoC), the SRAM cell is typically designed using very small transistors for high integration, which causes the large mismatch between transistors in the SRAM cell. Thus, as supply voltage scales down, the static noise margin (SNM) of the 6T SRAM can limit the supply voltage scaling. The stability of read operation is especially sensitive to voltage scaling. To deal with these problems, recently proposed SRAM cells decouple the storage node from the bitline. In this paper, we analyze recently proposed SRAM cells for low voltage operation using 22 nm FinFET model.
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UR - http://www.scopus.com/inward/citedby.url?scp=84875957485&partnerID=8YFLogxK
U2 - 10.1149/05201.0093ecst
DO - 10.1149/05201.0093ecst
M3 - Conference contribution
AN - SCOPUS:84875957485
SN - 9781607683810
T3 - ECS Transactions
SP - 93
EP - 98
BT - China Semiconductor Technology International Conference 2013, CSTIC 2013
ER -