Recently, for overcoming the fundamental limits o conventional silicon technology, multivalued logic (MVL) circuit based on two-dimensional (2D) materials have received significan attention for reducing the power consumption and the complexity of integrated circuits. Compared with the conventional silicon complementary metal oxide semiconductor technology, new functional heterostructures comprising 2D materials can be readily implemented, owing to their unique inherent electrical properties Furthermore, their process integration does not pose issues o lattice mismatch at junction interfaces. This facilitates the realization of new functional logic gate circuit configurations However, the reported three-valued NOT gates (ternary inverters) based on 2D materials require stringent operating conditions and complex fabrication processes to obtain three distinct logic states. Herein, a general structure of MVL devices based on a simple series connection of 2D materials with partial surface functionalization is demonstrated. By arranging three 2D materials exhibiting p-type, ambipolar, and n-type conductivities, ternary inverter circuits can be established based on the complementary driving between 2D heterotransistors. This ternary inverter circuit can be further improved for quaternary inverter circuits by controlling the charge neutral point of partial ambipolar 2D materials using surface functionalization, which is an effective and nondestructive doping method for 2D materials.
Bibliographical noteFunding Information:
This research was supported by the Basic Science Research Program through the National Research Foundation of Korea funded by the Korean government (MSIP) (grant numbers: 2018R1D1A1A09081931, 2020R1A4A2002806, and 2020M3F3A2A03082047). This work was supported by Samsung Electronics Co., Ltd. (IO201215-08197-01).
© 2021 American Chemical Society
All Science Journal Classification (ASJC) codes
- Materials Science(all)