Computation of switching noise in printed circuit boards

Jong Gwan Yook, V. Chandramouli, Linda P B Katehi, Karem A. Sakallah, Tawfik R. Arabi, Tim A. Schreyer

Research output: Contribution to journalArticle

27 Citations (Scopus)

Abstract

Simultaneous switching noise (SSN) is a phenomenon with adverse and severe effects when a large number of high speed chip drivers switch simultaneously causing a large amount of current to be injected into the power distribution grid. The effects of SSN are manifested in a variety of transient and permanent system malfunctions including the appearance of undesirable glitches on what should otherwise be quiet signal lines and the flipping of state bits in registers and memories. Current approaches for dealing with SSN are largely ad hoc, relying primarily on the ability of expert designers to postulate worst-case scenarios for the occurrence of SSN-related errors and to analyze these scenarios using pessimistic estimates of packaging parasitics. This paper takes a first step toward evolving a systematic methodology for modeling and analysis of SSN in printed circuit boards (PCB's). The presented methodology adopts a combination of macro- and micro-models which allow for a system level treatment of the problem without losing the necessary detailed descriptions of the power/ground planes, the signal traces and the vertical interconnections through vias or plated holes. This approach has been applied to a variety of PCB structures and has allowed for an effective characterization of switching noise and a comprehensive understanding of its effects on PCB performance.

Original languageEnglish
Pages (from-to)64-74
Number of pages11
JournalIEEE Transactions on Components Packaging and Manufacturing Technology Part A
Volume20
Issue number1
DOIs
Publication statusPublished - 1997 Mar 1

Fingerprint

Printed circuit boards
Macros
Packaging
Switches
Data storage equipment

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Yook, Jong Gwan ; Chandramouli, V. ; Katehi, Linda P B ; Sakallah, Karem A. ; Arabi, Tawfik R. ; Schreyer, Tim A. / Computation of switching noise in printed circuit boards. In: IEEE Transactions on Components Packaging and Manufacturing Technology Part A. 1997 ; Vol. 20, No. 1. pp. 64-74.
@article{9b940d7f7dfd49da80e74127d376fcaa,
title = "Computation of switching noise in printed circuit boards",
abstract = "Simultaneous switching noise (SSN) is a phenomenon with adverse and severe effects when a large number of high speed chip drivers switch simultaneously causing a large amount of current to be injected into the power distribution grid. The effects of SSN are manifested in a variety of transient and permanent system malfunctions including the appearance of undesirable glitches on what should otherwise be quiet signal lines and the flipping of state bits in registers and memories. Current approaches for dealing with SSN are largely ad hoc, relying primarily on the ability of expert designers to postulate worst-case scenarios for the occurrence of SSN-related errors and to analyze these scenarios using pessimistic estimates of packaging parasitics. This paper takes a first step toward evolving a systematic methodology for modeling and analysis of SSN in printed circuit boards (PCB's). The presented methodology adopts a combination of macro- and micro-models which allow for a system level treatment of the problem without losing the necessary detailed descriptions of the power/ground planes, the signal traces and the vertical interconnections through vias or plated holes. This approach has been applied to a variety of PCB structures and has allowed for an effective characterization of switching noise and a comprehensive understanding of its effects on PCB performance.",
author = "Yook, {Jong Gwan} and V. Chandramouli and Katehi, {Linda P B} and Sakallah, {Karem A.} and Arabi, {Tawfik R.} and Schreyer, {Tim A.}",
year = "1997",
month = "3",
day = "1",
doi = "10.1109/95.558546",
language = "English",
volume = "20",
pages = "64--74",
journal = "IEEE Transactions on Components Packaging and Manufacturing Technology Part A",
issn = "1070-9886",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "1",

}

Computation of switching noise in printed circuit boards. / Yook, Jong Gwan; Chandramouli, V.; Katehi, Linda P B; Sakallah, Karem A.; Arabi, Tawfik R.; Schreyer, Tim A.

In: IEEE Transactions on Components Packaging and Manufacturing Technology Part A, Vol. 20, No. 1, 01.03.1997, p. 64-74.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Computation of switching noise in printed circuit boards

AU - Yook, Jong Gwan

AU - Chandramouli, V.

AU - Katehi, Linda P B

AU - Sakallah, Karem A.

AU - Arabi, Tawfik R.

AU - Schreyer, Tim A.

PY - 1997/3/1

Y1 - 1997/3/1

N2 - Simultaneous switching noise (SSN) is a phenomenon with adverse and severe effects when a large number of high speed chip drivers switch simultaneously causing a large amount of current to be injected into the power distribution grid. The effects of SSN are manifested in a variety of transient and permanent system malfunctions including the appearance of undesirable glitches on what should otherwise be quiet signal lines and the flipping of state bits in registers and memories. Current approaches for dealing with SSN are largely ad hoc, relying primarily on the ability of expert designers to postulate worst-case scenarios for the occurrence of SSN-related errors and to analyze these scenarios using pessimistic estimates of packaging parasitics. This paper takes a first step toward evolving a systematic methodology for modeling and analysis of SSN in printed circuit boards (PCB's). The presented methodology adopts a combination of macro- and micro-models which allow for a system level treatment of the problem without losing the necessary detailed descriptions of the power/ground planes, the signal traces and the vertical interconnections through vias or plated holes. This approach has been applied to a variety of PCB structures and has allowed for an effective characterization of switching noise and a comprehensive understanding of its effects on PCB performance.

AB - Simultaneous switching noise (SSN) is a phenomenon with adverse and severe effects when a large number of high speed chip drivers switch simultaneously causing a large amount of current to be injected into the power distribution grid. The effects of SSN are manifested in a variety of transient and permanent system malfunctions including the appearance of undesirable glitches on what should otherwise be quiet signal lines and the flipping of state bits in registers and memories. Current approaches for dealing with SSN are largely ad hoc, relying primarily on the ability of expert designers to postulate worst-case scenarios for the occurrence of SSN-related errors and to analyze these scenarios using pessimistic estimates of packaging parasitics. This paper takes a first step toward evolving a systematic methodology for modeling and analysis of SSN in printed circuit boards (PCB's). The presented methodology adopts a combination of macro- and micro-models which allow for a system level treatment of the problem without losing the necessary detailed descriptions of the power/ground planes, the signal traces and the vertical interconnections through vias or plated holes. This approach has been applied to a variety of PCB structures and has allowed for an effective characterization of switching noise and a comprehensive understanding of its effects on PCB performance.

UR - http://www.scopus.com/inward/record.url?scp=0031095592&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0031095592&partnerID=8YFLogxK

U2 - 10.1109/95.558546

DO - 10.1109/95.558546

M3 - Article

VL - 20

SP - 64

EP - 74

JO - IEEE Transactions on Components Packaging and Manufacturing Technology Part A

JF - IEEE Transactions on Components Packaging and Manufacturing Technology Part A

SN - 1070-9886

IS - 1

ER -