Core-level DVFS for Spatial Multitasking GPUs

Jehee Cha, Jiho Kim, Yongjun Park

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

DVFS (Dynamic voltage frequency scaling) is one of the most widely used power management technologies employed to improve the performance or minimize the power consumption by controlling voltages and frequencies in real time. When applying device-level DVFS in graphics processing units (GPUs) that support spatial multitasking, it is difficult to determine the optimal DVFS status when multiple running kernels have different characteristics. To solve the problem, we created a GPU simulator that can operate at different streaming multiprocessor frequencies according to the characteristics of the assigned kernel and compared it with a single-clock-based spatial multitasking GPU simulator.

Original languageEnglish
Title of host publicationProceedings of TENCON 2018 - 2018 IEEE Region 10 Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1525-1528
Number of pages4
ISBN (Electronic)9781538654576
DOIs
Publication statusPublished - 2019 Feb 22
Event2018 IEEE Region 10 Conference, TENCON 2018 - Jeju, Korea, Republic of
Duration: 2018 Oct 282018 Oct 31

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
Volume2018-October
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Conference

Conference2018 IEEE Region 10 Conference, TENCON 2018
Country/TerritoryKorea, Republic of
CityJeju
Period18/10/2818/10/31

Bibliographical note

Funding Information:
This work was supported in part by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIP)(No.NRF-2015R1C1A1A01053844), ICT R&D program of MSIP/IITP (No.2017-0-00142), and the R&D program of MOTIE/KEIT (No.10077609).

Publisher Copyright:
© 2018 IEEE.

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering

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