Corrections to "CMOS transconductance multipliers: A tutorial"

G. Han; E. Sânchez-Sinencio

doi:10.1109/TCSII.1999.769820

Corrections to "CMOS transconductance multipliers: A tutorial"

G. Han, E. Sânchez-Sinencio

School of Integrated Technology

Research output: Contribution to journal › Article

Abstract

Some key references on the above paper were not included. Those references are provided here.

Original language	English
Number of pages	1
Journal	IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Volume	46
Issue number	5
DOIs	https://doi.org/10.1109/TCSII.1999.769820
Publication status	Published - 1999 Dec 1

All Science Journal Classification (ASJC) codes

Signal Processing
Electrical and Electronic Engineering

Access to Document

10.1109/TCSII.1999.769820

Fingerprint Dive into the research topics of 'Corrections to "CMOS transconductance multipliers: A tutorial"'. Together they form a unique fingerprint.

Cite this

Han, G., & Sânchez-Sinencio, E. (1999). Corrections to "CMOS transconductance multipliers: A tutorial". IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 46(5). https://doi.org/10.1109/TCSII.1999.769820

@article{c0f9fc5c1f9d4c8ab1b31c3ba8ce1e1e,

title = "Corrections to {"}CMOS transconductance multipliers: A tutorial{"}",

abstract = "Some key references on the above paper were not included. Those references are provided here.",

author = "G. Han and E. S{\^a}nchez-Sinencio",

year = "1999",

month = dec,

day = "1",

doi = "10.1109/TCSII.1999.769820",

language = "English",

volume = "46",

journal = "IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing",

issn = "1057-7130",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "5",

}

TY - JOUR

T1 - Corrections to "CMOS transconductance multipliers

T2 - A tutorial"

AU - Han, G.

AU - Sânchez-Sinencio, E.

PY - 1999/12/1

Y1 - 1999/12/1

N2 - Some key references on the above paper were not included. Those references are provided here.

AB - Some key references on the above paper were not included. Those references are provided here.

UR - http://www.scopus.com/inward/record.url?scp=33747634012&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33747634012&partnerID=8YFLogxK

U2 - 10.1109/TCSII.1999.769820

DO - 10.1109/TCSII.1999.769820

M3 - Article

AN - SCOPUS:33747634012

VL - 46

JO - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

JF - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

SN - 1057-7130

IS - 5

ER -