Data Direct I/O Characterization for Future I/O System Exploration

Mohammad Alian, Yifan Yuan, Jie Zhang, Ren Wang, Myoungsoo Jung, Nam Sung Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

I/O performance plays a critical role in the overall performance of modern servers. The emergence of ultra high-speed I/O devices makes the data movement between processors, main memory, and devices a major performance bottleneck. Conventionally, the main memory is used as an intermediate buffer between the processor and I/O devices and I/O devices cannot directly access processor side caches. Data Direct I/O (DDIO) technology aims to reduce the memory bandwidth utilization by enabling the I/O devices to leverage Last Level Cache (LLC) as the intermediate buffer. Our experimental results show that DDIO can completely eliminate memory bandwidth utilization while running network-or storage-intensive applications. However, when modeling the I/O subsystem using architectural simulators, DDIO is often ignored, which can result in inaccurate assessments about the I/O and memory sub system of emerging and future large-scale computer systems. In this paper, we provide a detailed background on DDIO technology in Intel server processors. Then we present our cycle-accurate I/O subsystem model in gem5 simulator that can be configured to model DDIO. We verify our model against baseline gem5 and validate it by comparing its results against a physical computer system.

Original languageEnglish
Title of host publicationProceedings - 2020 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages160-169
Number of pages10
ISBN (Electronic)9781728147987
DOIs
Publication statusPublished - 2020 Aug
Event2020 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2020 - Boston, United States
Duration: 2020 Aug 232020 Aug 25

Publication series

NameProceedings - 2020 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2020

Conference

Conference2020 IEEE International Symposium on Performance Analysis of Systems and Software, ISPASS 2020
CountryUnited States
CityBoston
Period20/8/2320/8/25

Bibliographical note

Funding Information:
VIII. ACKNOWLEDGMENTS We would like to thank the anonymous reviewers for their comments. We also thank Anil Vasudevan, Robert Blanken-ship, Bin Li and Charlie Tai, for their insightful feedback and technical support. This work is supported by funding from National Science Foundation (No. CNS-1705047).

Publisher Copyright:
© 2020 IEEE.

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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