Demonstration of 60-GHz link using a 1.6-Gb/s mixed-mode BPSK demodulator

Kwang Chun Choi, Minsu Ko, Duho Kim, Woo Young Choi

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-μm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380 × 500 μm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.

Original languageEnglish
Pages (from-to)1704-1707
Number of pages4
JournalIEICE Transactions on Electronics
VolumeE93-C
Issue number12
DOIs
Publication statusPublished - 2010 Dec

Fingerprint

Binary phase shift keying
Demodulators
Demonstrations
Personal communication systems
Digital to analog conversion
Demodulation
Telecommunication links

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Choi, Kwang Chun ; Ko, Minsu ; Kim, Duho ; Choi, Woo Young. / Demonstration of 60-GHz link using a 1.6-Gb/s mixed-mode BPSK demodulator. In: IEICE Transactions on Electronics. 2010 ; Vol. E93-C, No. 12. pp. 1704-1707.
@article{f4604cfcee8f445e967b12f117af45b1,
title = "Demonstration of 60-GHz link using a 1.6-Gb/s mixed-mode BPSK demodulator",
abstract = "A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-μm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380 × 500 μm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.",
author = "Choi, {Kwang Chun} and Minsu Ko and Duho Kim and Choi, {Woo Young}",
year = "2010",
month = "12",
doi = "10.1587/transele.E93.C.1704",
language = "English",
volume = "E93-C",
pages = "1704--1707",
journal = "IEICE Transactions on Electronics",
issn = "0916-8524",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "12",

}

Demonstration of 60-GHz link using a 1.6-Gb/s mixed-mode BPSK demodulator. / Choi, Kwang Chun; Ko, Minsu; Kim, Duho; Choi, Woo Young.

In: IEICE Transactions on Electronics, Vol. E93-C, No. 12, 12.2010, p. 1704-1707.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Demonstration of 60-GHz link using a 1.6-Gb/s mixed-mode BPSK demodulator

AU - Choi, Kwang Chun

AU - Ko, Minsu

AU - Kim, Duho

AU - Choi, Woo Young

PY - 2010/12

Y1 - 2010/12

N2 - A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-μm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380 × 500 μm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.

AB - A mixed-mode high-speed binary phase-shift keying (BPSK) demodulator for IEEE802.15.3c mm-wave wireless personal area network (WPAN) application is realized with 0.18-μm CMOS process. The proposed demodulator scheme does not require any analog-to-digital converters (ADC) and, consequently, can have advantages over the conventional schemes for high-data-rate demodulation. The demodulator core consumes 53.8 mW from 2.5-V power supply while the chip area is 380 × 500 μm2. The fabricated chip is verified by 60-GHz wireless link tests with 1.6-Gb/s data.

UR - http://www.scopus.com/inward/record.url?scp=78649994817&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=78649994817&partnerID=8YFLogxK

U2 - 10.1587/transele.E93.C.1704

DO - 10.1587/transele.E93.C.1704

M3 - Article

AN - SCOPUS:78649994817

VL - E93-C

SP - 1704

EP - 1707

JO - IEICE Transactions on Electronics

JF - IEICE Transactions on Electronics

SN - 0916-8524

IS - 12

ER -