Design and performance benchmarking of steep-slope tunnel transistors for low voltage digital and analog circuits enabling self-powered SOCs

Gaurav Kaushal, K. Subramanyam, Siva Nageswar Rao, G. Vidya, Radhika Ramya, Sadulla Shaik, H. Jeong, S. O. Jung, Ramesh Vaddi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)

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